參數(shù)資料
型號(hào)： DS26324GNA3+
廠商： Maxim Integrated Products
文件頁數(shù)： 43/120頁
文件大?。?/td> 0K
描述： IC LIU E1/T1/J1 3.3V 256-CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 16/16
規(guī)程： LIN
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA，CSBGA
供應(yīng)商設(shè)備封裝： 256-CSBGA（17x17）
包裝： 托盤
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
29 of 120
5.5.6.1
ANSI T1.231 for T1 and J1 Modes
Loss is detected if the received signal level is less than 200mV for duration of 192 bit periods. LOS is reset if the all
of the following criteria are met:
24 or more ones are detected in 192-bit period with a detection threshold of 300mV measured
at RTIP and RRING.
During the 192 bits less than 100 consecutive zeros are detected.
8 consecutive zeros are not detected if B8ZS is set.
5.5.6.2
ITU-T G.775 for E1 Modes
LOS is detected if the received signal level is less than 200mV for a continuous duration of 192 bit periods. LOS is
reset if the receive signal level is greater than 300mV for a duration of 192 bit periods.
5.5.6.3
ETS 300 233 for E1 Modes
LOS is detected if the received signal level is less than 200mV for a continuous duration of 2048 (1ms) bit periods.
LOS is reset if the receive signal level is greater than 300mV for a duration of 192 bit periods.
5.5.7
AIS
Table 5-7 outlines the DS26324 AIS related specifications. Table 5-8 states the AIS functionality in the DS26324.
The registers related to the AIS detection are shown in Table 5-9.
Table 5-7. AIS Criteria ANSI T1.231, ITU-T G.775, and ETS 300 233 Specifications
CRITERIA
STANDARD
ITU-T G.775 for E1
ETS 300 233 for E1
ANSI T1.231 for T1
AIS
Detection
Criteria
2 or fewer zeros in each of 2
consecutive 512-bit stream
received.
Fewer than 3 zeros detected in
512 bit period.
Fewer than 9 zeros detected in
a 8192-bit period (a ones
density of 99.9% over a period
of 5.3ms) are received.
AIS
Clearance
Criteria
3 or more zeros in each of 2
consecutive 512-bit streams
received.
3 or more zeros in 512 bits
received.
9 or more zeros detected in a
8192-bit period are received.
Table 5-8. AIS Detection and Reset Criteria for DS26324
CRITERIA
STANDARD
ITU-T G.775 for E1
ETS 300 233 for E1
ANSI T1.231 for T1
AIS
Detection
Criteria
2 or fewer zeros in each of 2
consecutive 512-bit streams
received.
Fewer than 3 zeros detected in
512-bit period.
Fewer than 9 zeros contained
in 8192 bits.
AIS
Clearance
Criteria
3 or more zeros in each of 2
consecutive 512-bit streams
received.
3 or more zeros in 512 bits
received.
9 or more bits received in a
8192-bit stream.
Table 5-9. Registers Related to AIS Detection
REGISTER
NAME
FUNCTIONALITY
LOS/AIS Criteria Selection
Section criteria for AIS (T1.231, G.775, ETS 300 233 for E1).
Alarm Indication Signal Status
Set when AIS is detected.
AIS Interrupt Enable
If reset, interrupt due to AIS is not generated.
AIS Interrupt Status
Latched if there is a change in AIS and the interrupt is enabled.
5.5.8
Receive Dual-Rail Mode
Receive dual-rail mode consists of the RPOS, RNEG, and RCLK pins on the system side. In receive dual-rail
mode, B8ZS and HDB3 decoding is not available. The data that appears on the RTIP and RRING pins is output on
RPOS and RNEG without any modification. The Single-Rail Mode Select Register (SRMS) is used for selection of
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