參數(shù)資料
型號(hào): DS26324GN+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 1/120頁(yè)
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 256-CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 500
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 16/16
規(guī)程: LIN
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA,CSBGA
供應(yīng)商設(shè)備封裝: 256-CSBGA(17x17)
包裝: 帶卷 (TR)
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Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
GENERAL DESCRIPTION
The DS26324 is a 16-channel
short-haul line
interface unit (LIU) that supports E1/T1/J1 from a
single 3.3V
power
supply.
A
wide variety
of
applications
are
supported
through
internal
impedance matching. A single bill of material can
support
E1/T1/J1
that
requires
no
external
termination.
Redundancy
is
supported
through
nonintrusive
monitoring,
optimal
high-impedance
modes
and
configurable
1:1
or
1+1
backup
enhancements. An on-chip synthesizer generates the
E1/T1/J1 clock rates by a single master clock input of
various frequencies. Two clock output references are
also offered. The device is offered in a 256-pin
TE-CSBGA, the smallest package available for a
16-channel LIU.
APPLICATIONS
T1 Digital Cross-Connects
ATM and Frame Relay Equipment
Wireless Base Stations
ISDN Primary Rate Interface
E1/T1/J1 Multiplexer and Channel Banks
E1/T1/J1 LAN/WAN Routers
FUNCTIONAL DIAGRAM
TNEG
RCLK
TPOS
TCLK
RPOS
RNEG
SOFTWARE CONTROL
AND JTAG
TRANSMITTER
RECEIVER
LOSS
1
16
RTIP
RRING
JTAG
TTIP
TRING
FEATURES
16 E1, T1, or J1 Short-Haul Line Interface
Units
Independent E1, T1 or J1 Selections
Fully Internal Impedance Match Requires No
External Resistors
Software-Selectable Transmit and Receive-
Side Impedance Match
Crystal-Less Jitter Attenuator
Selectable Single-Rail and Dual-Rail Mode
and AMI or HDB3/B8ZS Line Encoding and
Decoding
Detection and Generation of AIS
Digital/Analog Loss of Signal Detection as
per T1.231, G.775 and ETS 300 233
External Master Clock Can Be Multiple of
2.048MHz or 1.544MHz for T1/J1 or E1
Operation; This Clock Will Be Internally
Adapted for T1 or E1 Usage
Receiver Signal Level Indicator from -2.5dB to
-20dB in 2.5dB Increments
Two Built-In BERT Testers for Diagnostics
8-Bit Parallel Interface Support for Intel or
Motorola Mode or a 4-Wire Serial Interface
Transmit Short-Circuit Protection
G.772 Nonintrusive Monitoring
Receive Monitor Mode Handles Combinations
of 14dB to 20dB of Resistive Attenuation
Along with 12dB to 30dB of Cable Attenuation
Specification Compliance to the Latest T1
and E1 Standards
Single 3.3V Supply with 5V Tolerant I/O
JTAG Boundary Scan as Per IEEE 1149.1
ORDERING INFORMATION
PART
TEMP RANGE
PIN-PACKAGE
DS26324G+
0°C to +70°C
256 TE-CSBGA
DS26324GN+
-40°C to +85°C 256 TE-CSBGA
DS26324G
0°C to +70°C
256 TE-CSBGA
DS26324GN
-40°C to +85°C 256 TE-CSBGA
+Denotes a lead(Pb)-free/RoHS compliant package.
DEMO KIT AVAILABLE
DS26324
3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
19-5754; Rev 3/11
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