tLOW0 Sampling Window (" />
參數(shù)資料
型號(hào): DS2890P-000
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 11/27頁(yè)
文件大?。?/td> 0K
描述: IC POT DIGITAL 1-WIRE 100K 6TSOC
標(biāo)準(zhǔn)包裝: 120
接片: 256
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 800 ppm/°C
存儲(chǔ)器類型: 易失
接口: 1 線 串行
電源電壓: 2.8 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 6-LSOJ
供應(yīng)商設(shè)備封裝: 6-TSOC
包裝: 管件
DS2890
19 of 27
b) Write-zero Time Slot
15s
RESISTOR
MASTER
(OD: 2s)
DS2890
60s
tLOW0
Sampling Window
(OD: 6s)
REGULAR SPEED
OVERDRIVE SPEED
60 s ≤ tLOW0 < tSLOT < 120 s
1 s ≤ tREC <
6 s ≤ tLOW0 < tSLOT < 16 s
1 s ≤ tREC <
VPULLUP
VPULLUP MIN
VIH MIN
VIL MAX
0V
tSLOT
tREC
c) Read-data Time Slot
RESISTOR
MASTER
DS2890
Master
Sampling Window
REGULAR SPEED
OVERDRIVE SPEED
60 s ≤ t
SLOT < 120 s
1 s ≤ t
LOWR < 15 s
0 ≤ tRELEASE < 45 s
1 s ≤ tREC <
tRDV = 15 s
tSU < 1 s
6 s ≤ tSLOT < 16 s
1 s ≤ tLOWR < 2 s
0 ≤ tRELEASE < 4 s
1 s ≤ tREC <
tRDV = 2 s
t
SU < 1 s
VPULLUP
VPULLUP MIN
VIH MIN
VIL MAX
0V
t
SLOT
tREC
tLOWR
tSU
tRDV
tRELEASE
*The optimal sampling point for the master is as close as possible to the end time of the tRDV period
without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the
pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will
occur before the fastest 1-Wire device(s) release the line (tRELEASE = 0).
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