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| 型號(hào)： | DS3172 |
| 英文描述： | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| 中文描述： | 單/雙/三/四路、DS3/E3單芯片收發(fā)器 |
| 文件頁(yè)數(shù)： | 86/232頁(yè) |
| 文件大?。?/td> | 2133K |
| 代理商： | DS3172 |
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DS3171/DS3172/DS3173/DS3174
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F
X1
, F
X2
, F
X3
, and F
X4
bits are overwritten with the values one, zero, zero, and one (1001) respectively. X
1
and X
2
are overwritten with 11. P
1
, P
2,
C
31
, C
32
, and C
33
are overwritten with the calculated payload parity from the previous
output DS3 frame. And, C
X1
, C
X2
, and C
X3
(X 3) are overwritten with 000. AIS will overwrite a transmit Idle signal.
10.6.5.5.1 Receive C-bit DS3 Frame Format
The DS3 frame format is shown in
Figure 10-14
. X
1
and X
2
are the Remote Defect Indication (RDI) bits (also
referred to as the far-end SEF/AIS bits). P
1
and P
2
are the parity bits used for line error monitoring. M
1
, M
2
, and M
3
are the multiframe alignment bits that define the multiframe boundary. F
XY
are the subframe alignment bits that
define the subframe boundary. Note: Both the M-bits and F-bits define the DS3 frame boundary. C
11
is the
Application Identification Channel (AIC). C
12
is reserved for future network use, and has a value of one. C
13
is the
Far-End Alarm and Control (FEAC) signal. C
21
, C
22
, and C
23
are unused, and have a value of one. C
31
, C
32
, and C
33
are the C-bit parity bits used for path error monitoring. C
41
, C
42
, and C
43
are the Far-End Block Error (FEBE) bits
used for remote path error monitoring. C
51
, C
52
, and C
53
are the path maintenance data link (or HDLC) bits. C
61
,
C
62
, and C
63
are unused, and have a value of one. C
71
, C
72
, and C
73
are unused, and have a value of one.
10.6.5.5.2 Receive C-bit DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the C-bit DS3 frame. All of the DS3 overhead bits
X
1
, X
2
, P
1
, P
2
, M
X
, F
XY
, and C
XY
are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
P
1
, P
2
, C
31
, C
32
, and C
33
bits are output as an error indication (modulo 2 addition of the calculated parity and the
bit). The C
13
bit is sent over to the receive FEAC controller. The C
51
, C
52
, and C
53
bits are sent to the receive HDLC
overhead controller.
10.6.6 M23 DS3 Framer/Formatter
10.6.6.1 Transmit M23 DS3 Frame Processor
The M23 DS3 frame format is shown in
Figure 10-14
.
Table 10-28
defines the framing bits for M23 DS3. X
1
and X
2
are the Remote Defect Indication (RDI) bits (also referred to as the far-end SEF/AIS bits). P
1
and P
2
are the parity
bits used for line error monitoring. M
1
, M
2
, and M
3
are the multiframe alignment bits. F
XY
are the subframe
alignment bits. C
11
is the Application Identification Channel (AIC). C
X1
, C
X2
, and C
X3
are the stuff control bits for
tributary #X. The X-bit, P-bit, M-bit, C-bit, and F-bit positions are overhead bits, and the remainder of the bit
positions in the T3 frame are payload bits regardless of how they are marked by TDEN.
Table 10-28. M23 DS3 Frame Overhead Bit Definitions
Bit
Definition
X
1
, X
2
Remote Defect Indication
(RDI)
P
1
, P
2
Parity Bits
M
1
, M
2
, and M
3
Multiframe Alignment Bits
F
XY
Subframe Alignment Bits
C
11
Application Identification
Channel (AIC)
C
X1
, C
X2
, and C
X3
Stuff Control Bits for Tributary
#X
10.6.6.2 Transmit M23 DS3 Frame Generation
M23 DS3 frame generation receives the incoming payload data stream, and overwrites all of the DS3 overhead bit
locations.
The multiframe alignment bits (M
1
, M
2
, and M
3
) are overwritten with the values zero, one, and zero (010)
respectively.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3172N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3173 | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3173N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3174 | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
| DS3174N | Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3172+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3172N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3172N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3173 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3173N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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