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參數(shù)資料
| 型號： | DS3234S#T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC W/TCXO 20-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年，NVSRAM，方波輸出，TCXO/晶體 |
| 存儲容量： | 256B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | SPI |
| 電源電壓： | 2 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2 V ~ 3.8 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 帶卷 (TR) |
DS3234
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
10
____________________________________________________________________
date, month, and year information. The date at the end
of the month is automatically adjusted for months with
fewer than 31 days, including corrections for leap year.
The clock operates in either the 24-hour or 12-hour for-
mat with AM/PM indicator. Access to the internal regis-
ters is possible through an SPI bus interface.
A temperature-compensated voltage reference and
comparator circuit monitors the level of VCC to detect
power failures and to automatically switch to the backup
supply when necessary. When operating from the back-
up supply, access is inhibited to minimize supply cur-
rent. Oscillator, time and date, and TCXO operations can
continue while the backup supply powers the device.
The RST pin provides an external pushbutton function
and acts as an indicator of a power-fail event.
Operation
The block diagram shows the main elements of the
DS3234. The eight blocks can be grouped into four
functional groups: TCXO, power control, pushbutton
function, and RTC. Their operations are described sep-
arately in the following sections.
32kHz TCXO
The temperature sensor, oscillator, and control logic
form the TCXO. The controller reads the output of the
on-chip temperature sensor and uses a lookup table to
determine the capacitance required, adds the aging
correction in the AGE register, and then sets the
capacitance selection registers. New values, including
changes to the AGE register, are loaded only when a
change in the temperature value occurs. The tempera-
ture is read on initial application of VCC and once every
64 seconds (default, see the description for CRATE1
and CRATE0 in the
Control/Status Register section)
afterwards.
Power Control
The power control function is provided by a tempera-
ture-compensated voltage reference and a comparator
circuit that monitors the VCC level. The device is fully
accessible and data can be written and read when VCC
is greater than VPF. However, when VCC falls below
both VPF and VBAT, the internal clock registers are
blocked from any access. If VPF is less than VBAT, the
device power is switched from VCC to VBAT when VCC
drops below VPF. If VPF is greater than VBAT, the
device power is switched from VCC to VBAT when VCC
drops below VBAT. After VCC returns above both VPF
and VBAT, read and write access is allowed after RST
goes high (Table 1).
To preserve the battery, the first time VBAT is applied to
the device, the oscillator does not start up until VCC
crosses VPF. After the first time VCC is ramped up, the
oscillator starts up and the VBAT source powers the
oscillator during power-down and keeps the oscillator
running. When the DS3234 switches to VBAT, the oscil-
lator may be disabled by setting the EOSC bit.
VBAT Operation
There are several modes of operation that affect the
amount of VBAT current that is drawn. When the part is
powered by VBAT, timekeeping current (IBATT), which
includes the averaged temperature conversion current,
IBATTC, is drawn (refer to Application Note 3644: Power
Considerations for Accurate Real-Time Clocks for
details). Temperature conversion current, IBATTC, is
specified since the system must be able to support the
periodic higher current pulse and still maintain a valid
voltage level. Data retention current, IBATTDR, is the
current drawn by the part when the oscillator is
stopped (EOSC = 1). This mode can be used to mini-
mize battery requirements for times when maintaining
time and date information is not necessary, e.g., while
the end system is waiting to be shipped to a customer.
Pushbutton Reset Function
The DS3234 provides for a pushbutton switch to be
connected to the RST output pin. When the DS3234 is
not in a reset cycle, it continuously monitors the RST
signal for a low going edge. If an edge transition is
detected, the DS3234 debounces the switch by pulling
the RST low. After the internal timer has expired
(PBDB), the DS3234 continues to monitor the RST line.
If the line is still low, the DS3234 continuously monitors
the line looking for a rising edge. Upon detecting
release, the DS3234 forces the RST pin low and holds it
low for tRST.
The same pin, RST, is used to indicate a power-fail
condition. When VCC is lower than VPF, an internal
power-fail signal is generated, which forces the RST pin
low. When VCC returns to a level above VPF, the RST
pin is held low for tREC to allow the power supply to sta-
bilize. If the EOSC bit is set to logic 1 (to disable the
oscillator in battery-backup mode), tREC is bypassed
and RST immediately goes high.
SUPPLY CONDITION
READ/WRITE
ACCESS
ACTIVE
SUPPLY
RST
VCC < VPF, VCC < VBAT
No
VBAT
Active
VCC < VPF, VCC > VBAT
Yes
VCC
Active
VCC > VPF, VCC < VBAT
Yes
VCC
Inactive
VCC > VPF, VCC > VBAT
Yes
VCC
Inactive
Table 1. Power Control
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