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參數(shù)資料
| 型號： | DS33Z44DK |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/59頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DESIGN FOR DS33Z44 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) |
| 已用 IC / 零件： | DS33Z44 |
| 已供物品： | 板，2 個串行卡，CD |
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DS33Z44DK
14 of 59
BASIC SETTING
SILKSCREEN
REFERENCE
FUNCTION
SW MODE
HW MODE
DESCRIPTION
FULLDS
(1 per port)
DS33Z44 mode pin
HW mode only
High
Set high to enable full duplex.
H10S
(1 per port)
DS33Z44 mode pin
HW mode only
High
Set high to confg for 100Mb.
GROUND/VDD
(banana plug)
Power supply
ground/3.3V
—
Redundant connection to system
power. Use plugs at either top or
bottom of board.
VDD 3.3V
(banana plug)
Power supply VDD
—
Redundant connection to system
power. Use plugs at either top or
bottom of board.
Table 3. DS3174 Serial Reference Card Jumper Settings
JUMPER
SETTINGS
MODE
COMMENT
JP16
Port 4 tri-state
(at CPLD)
When the middle pin of this 3 position jumper is set to VCC, the
CPLD passes traffic from the DS3174 to the DS33Z44. When the pin
is set low, the CPLD tri-states this port.
JP17
Port 2 tri-state
(at CPLD)
When the middle pin of this 3 position jumper is set to VCC, the
CPLD passes traffic from the DS3174 to the DS33Z44. When the pin
is set low, the CPLD tri-states this port.
JP18
Port 3 tri-state
(at CPLD)
When the middle pin of this 3 position jumper is set to VCC, the
CPLD passes traffic from the DS3174 to the DS33Z44. When the pin
is set low, the CPLD tri-states this port.
JP19
Port 1 tri-state
(at CPLD)
When the middle pin of this 3 position jumper is set to VCC, the
CPLD passes traffic from the DS3174 to the DS33Z44. When the pin
is set low, the CPLD tri-states this port.
J243
CPLD loopback
CPLD loopback makes the following connections:
Zrser ← Ztser, Ztden ← 3.3V, Zrden ← 3.3V,
Ztclki ← OscY03, Zrclki ← OscY03
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