I2C, 8-Channel Gamma Buffer with EEPROM 8 _______________________________" />
參數(shù)資料
型號(hào): DS3508E+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 13/14頁(yè)
文件大?。?/td> 0K
描述: IC GAMMA BUFFER 8CH 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
應(yīng)用: TFT-LCD 面板:伽瑪緩沖器
電路數(shù): 8
電流 - 電源: 2mA
電流 - 輸出 / 通道: 6mA
電壓 - 電源,單路/雙路(±): 9 V ~ 15.5 V
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
DS3508
I2C, 8-Channel Gamma Buffer with EEPROM
8
_______________________________________________________________________________________
On power-up, the gamma data that is stored in each
channel’s EEPROM register is loaded into the corre-
sponding SRAM registers. The volatile CR register pow-
ers up as 00h, setting the device into mode 0.
DAC Description
The DACs are composed of a resistor string array and
a switching network per channel. A high-voltage array
with end points VHH and VHM controls outputs
GM1–GM4, and a low-voltage array with end points
VLM and VLL controls outputs GM5–GM8. The resistor
string arrays are composed of 255 identical resistors.
The switching networks can select any tap point
between adjacent resistors as well as either end point
(VHH/VHM or VLM/VLL pins). Table 1 shows the rela-
tionship between the 8-bit data and the DAC voltage.
EEPROM
SRAM
GMx
8-BIT
DAC
I2C
INTERFACE
SDA
SCL
A0
Figure 1. Single-Channel Block Diagram
VHH
VHM
CODE 0
RH1
CODE 1
RH254
CODE 254
RH255
CODE 255
CODE 2
CODE 253
RH2
RH3
RH253
VLL
VLM
CODE 0
RL1
CODE 1
RL254
CODE 254
RL255
CODE 255
CODE 2
CODE 253
RL2
RL3
RL253
Figure 2. DAC Block Diagram
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