DS3508
I2C, 8-Channel Gamma Buffer with EEPROM
______________________________________________________________________________________
13
byte before terminating the transaction. After the master
reads the last byte it must NACK to indicate the end of
the transfer and generates a STOP condition.
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. The master must NACK the last byte to
inform the slave that no additional bytes are to be read.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS3508,
decouple both power-supply pins (VCC and VDD) with a
0.01F or 0.1F capacitor. Use a high-quality ceramic
surface-mount capacitor if possible. Surface-mount
components minimize lead inductance, which improves
performance, and ceramic capacitors tend to have
adequate high-frequency response for decoupling
applications.
SDA and SCL Pullup Resistors
SDA is an I/O with an open-collector output that
requires a pullup resistor to realize high-logic levels. A
master using either an open-collector output with a
pullup resistor or a push-pull output driver can be used
for SCL. Pullup resistor values should be chosen to
ensure that the rise and fall times listed in the electrical
characteristics are within specification. A typical value
for the pullup resistors is 4.7k
Ω.
SLAVE
ADDRESS*
START
1
0
1
0
A0
R/W
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MSB
LSB
MSB
LSB
MSB
LSB
READ/
WRITE
REGISTER ADDRESS
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
DATA
STOP
SINGLE-BYTE WRITE
-WRITE CR REGISTER TO 80h
SINGLE-BYTE READ
-READ GM3
TWO-BYTE WRITE
- WRITE GM1 AND GM2 TO 80h
START
REPEATED
START
E9h
DATA
MASTER
NACK
STOP
11101000
02h
11101001
11101000
00001000
00000010
00000000
E8h
08h
80h
STOP
GM3
EXAMPLE I2C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND)
TYPICAL I2C WRITE TRANSACTION
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
10000000
E8h
A)
B)
C)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
START 11101000
E8h
00h
STOP
80h
1 00 0 0 0 0 0
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
80h
1 0000000
SLAVE
ACK
TWO-BYTE READ
- READ GM1 AND GM2
D)
START 11101000
E8h
00h
STOP
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MASTER
ACK
E9h
11101001
DATA
MASTER
NACK
REPEATED
START
GM1
GM2
Figure 5. I2C Communication Examples
Package Information
(For the latest package outline information, go to
www.maxim-ic.com/DallasPackInfo.)
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
20 TSSOP
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