參數(shù)資料
型號(hào): DS3911T+T
廠商: Maxim Integrated Products
文件頁數(shù): 15/24頁
文件大?。?/td> 0K
描述: IC DAC 10BIT I2C QUAD 14TDFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 10
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 1.74W
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 14-TDFN-EP(3x5)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): *
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
22
Maxim Integrated
Table 04h, Register F8h–FFh: DAC0 OFFSET
Table 05h, Register F8h–FFh: DAC1 OFFSET
Table 06h, Register F8h–FFh: DAC2 OFFSET
Table 07h, Register F8h–FFh: DAC3 OFFSET
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS3911,
decouple the power supply with a 0.01FF or 0.1FF capac-
itor. Use a high-quality ceramic surface-mount capacitor
if possible. Surface-mount components minimize lead
inductance, which improves performance, and ceram-
ic capacitors tend to have adequate high-frequency
response for decoupling applications. Likewise, a decou-
pling capacitor should be placed from VREF to GND.
SDA and SCL Pullup Resistors
SDA is an I/O with an open-collector output that requires
a pullup resistor to realize high-logic levels. A master
using either an open-collector output with a pullup resis-
tor or a push-pull output driver can be used for SCL.
Pullup resistor values should be chosen to ensure that
the rise and fall times listed in the I2C AC Electrical
Characteristics table are within specification. A typical
value for the pullup resistors is 4.7kI.
FACTORY DEFAULT
00h
ACCESS
R/W
MEMORY TYPE
Nonvolatile
F8h–FFh
27
26
25
24
23
22
21
20
BIT 7
BIT 0
The DAC OFFSET is a set of registers assigned to hold the pulse-density modulation profile for the associated DAC.
The values in this table are multiplied by four and added to the corresponding value in the LUT table to determine
the set point for the associated DAC. In all four DAC tables, the DAC OFFSET registers are formatted the same. The
OFFSET registers increase in 16NC steps from -8NC to +88NC. Below -8NC the DAC OFFSET is indexed at 0xF8. See
the Offset Temperature Mapping table for full register to temperature mapping. Register F8h defines the -40NC to
-8NC DAC OFFSET value, register F9h defines the -8NC to +8NC DAC OFFSET value, and so on.
OFFSET TEMPERATURE MAPPING
ROW
(HEX)
BYTE 0
BYTE 1
BYTE 2
BYTE 3
BYTE 4
BYTE 5
BYTE 6
BYTE 7
F8h
< -8N
-8N
+8N
+24N
+40N
+56N
+72N
R
+88N
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