參數(shù)資料
型號(hào): DS80C320MNG
英文描述: (434.89 k)
中文描述: (434.89十一)
文件頁數(shù): 15/38頁
文件大?。?/td> 434K
代理商: DS80C320MNG
DS80C320/DS80C323
110196 15/38
Note that internally generated interrupts (timer, serial
port, watchdog) are not useful since they require clock-
ing activity.
IDLE MODE ENHANCEMENTS
A simple enhancement to Idle mode makes it substan-
tially more useful. The innovation involves not the Idle
mode itself, but the watchdog timer. As mentioned
above, the Watchdog Timer provides an optional inter-
rupt capability. This interrupt can provide a periodic
interval timer to bring the DS80C320/DS80C323 out of
Idle mode. This can be useful even if the Watchdog is
not normally used. By enabling the Watchdog Timer and
its interrupt prior to invoking Idle, a user can periodically
come out of Idle perform an operation, then return to Idle
until the next operation. This will lower the overall power
consumption. When using the Watchdog Interrupt to
cancel the Idle state, make sure to restart the Watchdog
Timer or it will cause a reset.
STOP MODE ENHANCEMENTS
The DS80C320/DS80C323 provides two enhance-
ments to the Stop mode. As documented above, the
device provides a band–gap reference to determine
Power–fail Interrupt and Reset thresholds. The default
state is that the band–gap reference is off when Stop
mode is invoked. This allows the extremely low power
state mentioned above. A user can optionally choose to
have the band–gap enabled during Stop mode. This
means that PFI and power–fail reset will be activated
and are valid means for leaving Stop mode.
In Stop mode with the band–gap on, I
CC
will be approxi-
mately 50
μ
A compared with 1
μ
A with the band–gap off.
If a user does not require a Power–fail Reset or Interrupt
while in Stop mode, the band–gap can remain turned
off. Note that only the most power sensitive applications
should turn off the band–gap, as this results in an uncon-
trolled power down condition.
The control of the band–gap reference is located in the
Extended Interrupt Flag register (EXIF – 91h). Setting
BGS (EXIF.0) to an one will leave the band–gap refer-
ence enabled during Stop mode. The default or reset
condition is with the bit at a logic 0. This results in the
band–gap being turned off during Stop mode. Note that
this bit has no control of the reference during full power
or Idle modes.
The second feature allows an additional power saving
option. This is the ability to start instantly when exiting
Stop mode. It is accomplished using an internal ring
oscillator that can be used when exiting Stop mode in
response to an interrupt. The benefit of the ring oscilla-
tor is as follows.
Using Stop mode turns off the crystal oscillator and all
internal clocks to save power. This requires that the
oscillator be restarted when exiting Stop mode. Actual
start–up time is crystal dependent, but is normally at
least 4 ms. A common recommendation is 10 ms. In an
application that will wake–up, perform a short operation,
then return to sleep, the crystal start–up can be longer
than the real transaction. However, the ring oscillator
will start instantly. The user can perform a simple opera-
tion and return to sleep before the crystal has even sta-
bilized. If the ring is used to start and the processor
remains running, hardware will automatically switch to
the crystal once a power–on reset interval (65536
clocks) has expired. This value is used to guarantee sta-
bility even though power is not being cycled.
If the user returns to Stop mode prior to switching of
crystal, then all clocks will be turned off again. The ring
oscillator runs at approximately 4 MHz but will not be a
precision value. No real–time precision operations
(including serial communication) should be conducted
during this ring period. Figure 7 shows how the opera-
tion would compare when using the ring, and when
starting up normally. The default state is to come out of
Stop mode without using the ring oscillator.
This function is controlled using the RGSL – Ring Select
bit at EXIF.1 (EXIF – 91h). When EXIF.1 is set, the ring
oscillator will be used to come out of Stop mode quickly.
As mentioned above, the processor will automatically
switch from the ring (if enabled) to the crystal after a
delay of 65536 crystal clocks. For a 3.57 MHz crystal,
this is approximately 18 ms. The processor sets a flag
called RGMD – Ring Mode to tell software that the ring is
being used. This bit at EXIF.2 will be a logic 1 when the
ring is in use. No serial communication or precision tim-
ing should be attempted while this bit is set, since the
operating frequency is not precise.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS80C320-MNG 功能描述:8位微控制器 -MCU High-Speed Low-Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C320-MNG+ 功能描述:8位微控制器 -MCU High-Speed Low-Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C320-MNL 功能描述:8位微控制器 -MCU High-Speed Low-Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C320-MNL+ 功能描述:8位微控制器 -MCU High-Speed Low-Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS80C320-MNR 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide