參數(shù)資料
型號: DS90LV804TSQ/NOPB
廠商: National Semiconductor
文件頁數(shù): 13/15頁
文件大?。?/td> 0K
描述: IC BUFF REPEATER LVDS 4CH 32LLP
產(chǎn)品培訓模塊: High Speed LVDS
標準包裝: 1
類型: 緩沖器
Tx/Rx類型: LVDS
延遲時間: 3.2ns
電容 - 輸入: 3.5pF
電源電壓: 3.15 V ~ 3.45 V
電流 - 電源: 140mA
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應商設(shè)備封裝: 32-LLP-EP(5x5)
包裝: 標準包裝
產(chǎn)品目錄頁面: 1280 (CN2011-ZH PDF)
其它名稱: DS90LV804TSQDKR
SNLS195L – SEPTEMBER 2005 – REVISED APRIL 2013
PIN DESCRIPTIONS
Pin
WQFN Pin
I/O, Type
Description
Name
Number
DIFFERENTIAL INPUTS
IN0+
9
I, LVDS
Channel 0 inverting and non-inverting differential inputs.
IN0
10
IN1+
11
I, LVDS
Channel 1 inverting and non-inverting differential inputs.
IN1
12
IN2+
13
I, LVDS
Channel 2 inverting and non-inverting differential inputs.
IN2
14
IN3+
15
I, LVDS
Channel 3 inverting and non-inverting differential inputs.
IN3
16
DIFFERENTIAL OUTPUTS
OUT0+
32
O, LVDS Channel 0 inverting and non-inverting differential outputs(1)
OUT0
31
OUT1+
30
O, LVDS Channel 1 inverting and non-inverting differential outputs(1)
OUT1
29
OUT2+
28
O, LVDS Channel 2 inverting and non-inverting differential outputs(1)
OUT2
27
OUT3+
26
O, LVDS Channel 3 inverting and non-inverting differential outputs(1)
OUT3-
25
DIGITAL CONTROL INTERFACE
EN
8
I, LVTTL
Enable pin. When EN is LOW, the driver is disabled and the LVDS outputs are in TRI-
STATE. When EN is HIGH, the driver is enabled. LVCMOS/LVTTL level input.
POWER
VDD
3, 4, 6, 7, 19, 20, 21, 22
I, Power
VDD = 3.3V, ±5%
GND
1, 2, 5, 17, 18(2)
I, Power
Ground reference for LVDS and CMOS circuitry. For the WQFN package, the DAP is
used as the primary GND connection to the device. The DAP is the exposed metal
contact at the bottom of the WQFN-32 package. It should be connected to the ground
plane with at least 4 vias for optimal AC and thermal performance. The pin numbers
listed should also be tied to ground for proper biasing.
N/C
23, 24
No Connect
(1)
The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the DS90LV804 device have
been optimized for point-to-point backplane and cable applications.
(2)
Note that for the WQFN package the GND is connected thru the DAP on the back side of the WQFN package in addition to grounding
actual pins on the package as listed.
Copyright 2005–2013, Texas Instruments Incorporated
7
Product Folder Links: DS90LV804
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