參數(shù)資料
型號： DSP102KP
英文描述： TVS 400W 6.0V UNIDIRECT SMA
中文描述： DSP兼容采樣單/雙模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 5/22頁
文件大小： 252K
代理商： DSP102KP
DSP101/102
5
TYPICAL DSP102 FFT SETUP
REF
VINA
VPOTA
VINB
VPOTB
Burr-Brown
ZPB34
DSP
Processor
CASC
SSF
OSC1
CLKOUT
CLKIN
CONV
XCLK
SYNC
SOUTA
DSP102
22
12
13
11
10
21
16
15
20
200kHz
150
16MHz TTL Oscillator
FFT
Software
÷80
÷2
+5V
8MHz
27
26
25
0.1μF
1
10μF
+
10μF
+
220pF
150
220pF
Brüel & Kjaer
Model 1049
Digital Signal
Generator
6 Pole,
150kHz
Low-Pass
Filter
1kHz
1/2
OPA2604
1/2
OPA2604
2
±2.75V
DSP101 PIN ASSIGNMENTS
PIN #
NAME
DESCRIPTION
1
VPOT
Trim Reference Out. 10
μ
F Tantalum to AGND.
Voltage on this pin is approximately 2.75V.
Analog In.
MSB Adjust In.
VOS Adjust In.
–5V Analog Power.
+5V Analog Power.
Digital Ground.
Digital Ground.
+5V Digital Power.
Conversion Clock In.
Conversion Clock Out. Can drive multiple
DSP101/DSP102s to synchronize conversion.
Select Synch Format In. If HIGH, SYNC will be
active High. If LOW, SYNC will be active Low.
See timing diagram (Figure 1).
Oscillator Point 1 Input/External Clock In. If using
external clock, drive with 74HC logic levels.
Connect to DGND if not used.
Oscillator Point 2 Output. Provides drive for
crystal oscillator. Make no electrical connection if
using external clock.
Data Synchronization Out. Active High when SSF
is HIGH; active Low when SSF is LOW.
Data Transfer Clock In.
No Internal Connection.
User Tag In. Data clocked into this pin is
appended to the conversion results on SOUT.
See timing diagram (Figure 1).
No Internal Connection.
Serial Data Out. MSB first, Binary Two’s
Complement format.
Convert Command In. Falling edge puts converter
into hold state, initiates conversion, and transmits
previous conversion results to DSP IC with
appropriate SYNC pulse.
Digital Ground.
No Internal Connection.
No Internal Connection.
No Internal Connection.
Bypass Capacitor. 10
μ
F Tantalum to AGND.
Voltage on this pin is approximately 2.7V.
Reference Bypass. 0.1
μ
F Ceramic to AGND.
Voltage on this pin is approximately 3.8V.
Analog Ground.
2
3
4
5
6
7
8
9
10
11
VIN
MSB
VOS
V
A
–
V
+
DGND
DGND
V
CLKIN
CLKOUT
12
SSF
13
OSC1
14
OSC2
15
SYNC
16
17
18
XCLK
TAG
19
20
SOUT
21
CONV
22
23
24
25
26
DGND
CAP
27
REF
28
AGND
DSP101 PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
V
A
+ to Analog Common .................................................................... +7V
V
A
– to Analog Common.................................................................... –7V
V
to Digital Common........................................................................ +7V
Analog Common to Digital Common ...................................................
±
1V
Control Inputs to Digital Common ............................... –0.5 to V
D
+ 0.5V
Analog Input Voltage ..........................................................................
±
5V
Maximum Junction Temperature .................................................... 150
o
C
Internal Power Dissipation ............................................................. 825mW
Lead Temperature (soldering, 10s) ............................................... +300
o
C
Thermal Resistance,
θ
JA
, Plastic DIP ............................................50
o
C/W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VPOT
VIN
MSB
VOS
V –
A
V +
A
DGND
DGND
V
D
CLKIN
CLKOUT
SSF
OSC1
OSC2
AGND
REF
CAP
DGND
CONV
SOUT
TAG
XCLK
SYNC
DSP101
Top View
DIP
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