參數(shù)資料
型號: DSP56858FVE
廠商: Freescale Semiconductor
文件頁數(shù): 6/64頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 47
程序存儲器容量: 80KB(40K x 16)
程序存儲器類型: SRAM
RAM 容量: 24K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
56858 Technical Data, Rev. 6
14
Freescale Semiconductor
HD6
GPIOB6
K5
43
Input
Input/Output
Host Address (HD6)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
Port B GPIO (6)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
HD7
GPIOB7
H5
44
Input
Input/Output
Host Address (HD7)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
Port B GPIO (7)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
HA0
GPIOB8
G10
90
Input
Input/Output
Host Address (HA0)—These inputs provide the address selection for
HI registers.
These pins are disconnected internally during reset.
Port B GPIO (8)—These pins are General Purpose I/O (GPIO) pins
when not configured for host port usage.
HA1
GPIOB9
G11
91
Input
Input/Output
Host Address (HA0)—These inputs provide the address selection for
HI registers.
These pins are disconnected internally during reset.
Port B GPIO (9)—These pins are General Purpose I/O (GPIO) pins
when not configured for host port usage.
HA2
GPIOB10
G9
92
Input
Input/Output
Host Address (HA0)—These inputs provide the address selection for
HI registers.
These pins are disconnected internally during reset.
Port B GPIO (10)—These pins are General Purpose I/O (GPIO) pins
when not configured for host port usage.
HRWB
HRD
GPIOB11
G8
93
Input
Input/Output
Host Read/Write (HRWB)—When the HI08 is programmed to
interface to a single-data-strobe host bus and the HI function is
selected, this signal is the Read/Write input.
These pins are disconnected internally during reset.
Host Read Data (HRD)—This signal is the Read Data input when the
HI08 is programmed to interface to a double-data-strobe host bus and
the HI function is selected.
Port B GPIO (11) —This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
BGA
Pin No.
LQFP
Pin No.
Type
Description
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