參數(shù)資料
型號: DSP56F801FA60E
廠商: Freescale Semiconductor
文件頁數(shù): 31/48頁
文件大小: 0K
描述: IC DSP 60MHZ 16KB FLASH 48-LQFP
標準包裝: 250
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 60MHz
連通性: SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 11
程序存儲器容量: 20KB(10K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
Analog-to-Digital Converter (ADC) Characteristics
56F801 Technical Data, Rev. 17
Freescale Semiconductor
37
1.
Parasitic capacitance due to package, pin to pin, and pin to package base coupling. (1.8pf)
2.
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing. (2.04pf)
3.
Equivalent resistance for the ESD isolation resistor and the channel select mux. (500 ohms)
4.
Sampling capacitor at the sample and hold circuit. Capacitor 4 is normally disconnected from the input and is only connected to it at
sampling time. (1pf)
Figure 3-26 Equivalent Analog Input Circuit
Total Harmonic Distortion5
THD
55
60
dB
Signal-to-Noise plus Distortion5
SINAD
54
56
dB
Effective Number of Bits5
ENOB
8.5
9.5
bit
Spurious Free Dynamic Range5
SFDR
60
65
dB
Bandwidth
BW
100
KHz
ADC Quiescent Current (both ADCs)
IADC
—50
mA
VREF Quiescent Current (both ADCs)
IVREF
—12
16.5
mA
1.
For optimum ADC performance, keep the minimum VADCIN value > 250mV. Inputs less than 250mV volts may convert to
a digital output code of 0 or cause erroneous conversions.
2.
VREF must be equal to or less than VDDA - 0.3V and must be greater than 2.7V.
3.
Measured in 10-90% range.
4.
LSB = Least Significant Bit.
5.
Guaranteed by characterization.
6.
tAIC = 1/fADIC
Table 3-15 ADC Characteristics (Continued)
Characteristic
Symbol
Min
Typ
Max
Unit
1
2
3
4
ADC analog input
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