參數(shù)資料
型號： DSPB56374AFC
廠商： Freescale Semiconductor
文件頁數(shù)： 63/64頁
文件大?。?/td> 0K
描述： IC DSP 24BIT 150MHZ 80-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： DSP56K/Symphony
類型： 音頻處理器
接口： 主機(jī)接口，I²C，SAI，SPI
時鐘速率： 150MHz
非易失內(nèi)存： ROM（84 kB）
芯片上RAM： 54kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.25V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤
DSP56374 Data Sheet, Rev. 4.2
Signal Groupings
Freescale Semiconductor
8
4.5
Interrupt and Mode Control
The interrupt and mode control signals select the chip’s operating mode as it comes out of hardware reset.
After RESET is de-asserted, these inputs are hardware interrupt request lines.
Table 8. Interrupt and Mode Control
Signal Name
Type
State
during
Reset
Signal Description
MODA/IRQA
Input
MODA
Input
Mode Select A/External Interrupt Request A—MODA/IRQA is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODA/IRQA selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into the OMR when the RESET signal is
de-asserted. If the processor is in the stop standby state and the
MODA/IRQA pin is pulled to GND, the processor will exit the stop state.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
PH0
Input, output,
or
disconnected
Port H0—When the MODA/IRQA is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
MODB/IRQB
Input
MODB
Input
Mode Select B/External Interrupt Request B—MODB/IRQB is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODB/IRQB selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into OMR when the RESET signal is
de-asserted.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
PH1
Input, output,
or
disconnected
Port H1—When the MODB/IRQB is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
MODC/IRQC
Input
MODC
Input
Mode Select C/External Interrupt Request C—MODC/IRQC is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODC/IRQC selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into OMR when the RESET signal is
de-asserted.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
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