參數(shù)資料
型號(hào): DSPB56374AFC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 9/64頁(yè)
文件大?。?/td> 0K
描述: IC DSP 24BIT 150MHZ 80-LQFP
標(biāo)準(zhǔn)包裝: 90
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機(jī)接口,I²C,SAI,SPI
時(shí)鐘速率: 150MHz
非易失內(nèi)存: ROM(84 kB)
芯片上RAM: 54kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
Signal Groupings
DSP56374 Data Sheet, Rev. 4.2
Freescale Semiconductor
17
4.8
Enhanced Serial Audio Interface_1
Table 11. Enhanced Serial Audio Interface_1 Signals
Signal Name
Signal Type
State during
Reset
Signal Description
HCKR_1
Input or output
GPIO
disconnected
High Frequency Clock for Receiver—When programmed as
an input, this signal provides a high frequency clock source
for the ESAI_1 receiver as an alternate to the DSP core
clock. When programmed as an output, this signal can
serve as a high-frequency sample clock (e.g., for external
digital to analog converters [DACs]) or as an additional
system clock.
PE2
Input, output, or
disconnected
Port E2—When the ESAI_1 is configured as GPIO, this
signal is individually programmable as input, output, or
internally disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
HCKT_1
Input or output
GPIO
disconnected
High Frequency Clock for Transmitter—When programmed
as an input, this signal provides a high frequency clock
source for the ESAI_1 transmitter as an alternate to the
DSP core clock. When programmed as an output, this
signal can serve as a high frequency sample clock (e.g., for
external DACs) or as an additional system clock.
PE5
Input, output, or
disconnected
Port E5—When the ESAI_1 is configured as GPIO, this
signal is individually programmable as input, output, or
internally disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
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