參數(shù)資料
型號： DSPIC30F2010-20I/SO
廠商： Microchip Technology
文件頁數(shù)： 31/66頁
文件大小： 0K
描述： IC DSPIC MCU/DSP 12K 28SOIC
產(chǎn)品培訓(xùn)模塊： dsPIC30F Quadrature Encoder Interface
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝： 27
系列： dsPIC™ 30F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 20 MIPS
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 高級欠壓探測/復(fù)位，電機控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 20
程序存儲器容量： 12KB（4K x 24）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
配用： XLT28SO-1-ND - SOCKET TRANSITION 28SOIC 300MIL
其它名稱： DSPIC30F2010-20I/SOG
DSPIC30F201020IS
2010 Microchip Technology Inc.
DS70102K-page 37
dsPIC30F Flash Programming Specification
11.4
Flash Memory Programming in
ICSP Mode
Programming in ICSP mode is described in
ming Cycle”. Step-by-step procedures are described
operations must use serial execution, as described in
11.4.1
PROGRAMMING OPERATIONS
Flash memory write and erase operations are
controlled by the NVMCON register. Programming is
performed by setting NVMCON to select the type of
erase operation (Table 11-2) or write operation
(Table 11-3), writing a key sequence to enable the
programming and initiating the programming by setting
the WR control bit, NVMCON<15>.
In ICSP mode, all programming operations are
externally timed. An external 2 ms delay must be used
between setting the WR control bit and clearing the WR
control bit to complete the programming operation.
TABLE 11-2:
NVMCON ERASE
OPERATIONS
NVMCON
Value
Erase Operation
0x407F
Erase all code memory, data memory
(does not erase UNIT ID).
0x4075
Erase 1 row (16 words) of data
EEPROM.
0x4074
Erase 1 word of data EEPROM.
0x4072
Erase all executive memory.
0x4071
Erase 1 row (32 instruction words)
from 1 panel of code memory.
0x406E
Erase Boot Secure and General
Segments, then erase FBS, FSS and
FGS configuration registers.
0x4066
Erase all Data EEPROM allocated to
Boot Segment.
0x405E
Erase Secure and General Segments,
then erase FSS and FGS configuration
registers.
0x4056
Erase all Data EEPROM allocated to
Secure Segment.
0x404E
Erase General Segment, then erase
FGS configuration register.
0x4046
Erase all Data EEPROM allocated to
General Segment.
TABLE 11-3:
NVMCON WRITE
OPERATIONS
NVMCON
Value
Write Operation
0x4008
Write 1 word to configuration
memory.
0x4005
Write 1 row (16 words) to data memory.
0x4004
Write 1 word to data memory.
0x4001
Write 1 row (32 instruction words) into
1 panel of program memory.
11.4.2
UNLOCKING NVMCON FOR
PROGRAMMING
Writes to the WR bit (NVMCON<15>) are locked to
prevent accidental programming from taking place.
Writing a key sequence to the NVMKEY register
unlocks the WR bit and allows it to be written to. The
unlock sequence is performed as follows:
MOV
#0x55, W8
MOV
W8, NVMKEY
MOV
#0xAA, W9
MOV
W9, NVMKEY
Note:
Any working register, or working register
pair, can be used to write the unlock
sequence.
11.4.3
STARTING AND STOPPING A
PROGRAMMING CYCLE
Once the unlock key sequence has been written to the
NVMKEY register, the WR bit (NVMCON<15>) is used
to start and stop an erase or write cycle. Setting the WR
bit initiates the programming cycle. Clearing the WR bit
terminates the programming cycle.
All erase and write cycles must be externally timed. An
external delay must be used between setting and
clearing the WR bit. Starting and stopping a
programming cycle is performed as follows:
BSET
NVMCON, #WR
<Wait 2 ms>
BCLR
NVMCON, #WR
11.5
Erasing Program Memory in
Normal-Voltage Systems
The procedure for erasing program memory (all code
memory, data memory, executive memory and code-
protect bits) consists of setting NVMCON to 0x407F,
unlocking NVMCON for erasing and then executing the
programming cycle. This method of bulk erasing pro-
gram memory only works for systems where VDD is
between 4.5 volts and 5.5 volts. The method for erasing
program memory for systems with a lower VDD (3.0
volts-4.5 volts) is described in Section 6.1 “Erasing
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參數(shù)描述
DSPIC30F2010-20ISP 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSPIC30F2010-30I 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-bit Digital Signal Controllers
dsPIC30F2010-30I/MM 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B MCU DSP 28LD 20MIPS 12KB FLASH RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSPIC30F2010-30I/MMG 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16bit Signal Cntrlr Lead Free Package RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSPIC30F2010-30I/SO 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 20MHz 12KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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