參數(shù)資料
型號: DSPIC30F2010T-20E/MM
廠商: Microchip Technology
文件頁數(shù): 10/49頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 12K 28QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標準包裝: 1,600
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 高級欠壓探測/復(fù)位,電機控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 12KB(4K x 24)
程序存儲器類型: 閃存
EEPROM 大小: 1K x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 帶卷 (TR)
dsPIC30F2010
DS70118J-page 18
2011 Microchip Technology Inc.
2.4.2.4
Data Space Write Saturation
In addition to adder/subtracter saturation, writes to data
space may also be saturated, but without affecting the
contents of the source accumulator. The data space
write saturation logic block accepts a 16-bit, 1.15
fractional value from the round logic block as its input,
together with overflow status from the original source
(accumulator) and the 16-bit round adder. These are
combined and used to select the appropriate 1.15
fractional value as output to write to data space
memory.
If the SATDW bit in the CORCON register is set, data
(after rounding or truncation) is tested for overflow and
adjusted accordingly. For input data greater than
0x007FFF, data written to memory is forced to the
maximum positive 1.15 value, 0x7FFF. For input data
less than 0xFF8000, data written to memory is forced to
the maximum negative 1.15 value, 0x8000. The Most
Significant bit of the source (bit 39) is used to determine
the sign of the operand being tested.
If the SATDW bit in the CORCON register is not set, the
input data is always passed through unmodified under
all conditions.
2.4.3
BARREL SHIFTER
The barrel shifter is capable of performing up to 15-bit
arithmetic or logic right shifts, or up to 16-bit left shifts
in a single cycle. The source can be either of the two
DSP accumulators or the X bus (to support multi-bit
shifts of register or memory data).
The shifter requires a signed binary value to determine
both the magnitude (number of bits) and direction of the
shift operation. A positive value will shift the operand
right. A negative value will shift the operand left. A
value of 0 will not modify the operand.
The barrel shifter is 40 bits wide, thereby obtaining a
40-bit result for DSP shift operations and a 16-bit result
for MCU shift operations. Data from the X bus is pre-
sented to the barrel shifter between bit positions 16 to
31 for right shifts, and bit positions 0 to 15 for left shifts.
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