參數(shù)資料
型號(hào): DSPIC30F2011-30I/SO
廠商: Microchip Technology
文件頁(yè)數(shù): 65/66頁(yè)
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 12K 18SOIC
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 42
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 30 MIP
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲(chǔ)器容量: 12KB(4K x 24)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 650 (CN2011-ZH PDF)
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
AC30F005-ND - MODULE SCKT DSPIC30F 18DIP/SOIC
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名稱: DSPIC30F201130ISO
dsPIC30F Flash Programming Specification
DS70102K-page 8
2010 Microchip Technology Inc.
5.5.3
PROGRAMMING VERIFICATION
Once code memory is programmed, the contents of
memory can be verified to ensure that programming
was successful. Verification requires code memory to
be read back and compared against the copy held in
the programmer’s buffer.
The READP command can be used to read back all the
programmed code memory.
Alternatively, you can have the programmer perform
the verification once the entire device is programmed
using a checksum computation, as described in
5.6
Data EEPROM Programming
5.6.1
OVERVIEW
The panel architecture for the data EEPROM memory
array consists of 128 rows of sixteen 16-bit data words.
Each panel stores 2K words. All devices have either
one or no memory panels. Devices with data EEPROM
provide either 512 words, 1024 words or 2048 words of
memory on the one panel (see Table 5-3).
TABLE 5-3:
DATA EEPROM SIZE
Device
Data EEPROM
Size (Words)
Number of
Rows
dsPIC30F2010
512
32
dsPIC30F2011
0
dsPIC30F2012
0
dsPIC30F3010
512
32
dsPIC30F3011
512
32
dsPIC30F3012
512
32
dsPIC30F3013
512
32
dsPIC30F3014
512
32
dsPIC30F4011
512
32
dsPIC30F4012
512
32
dsPIC30F4013
512
32
dsPIC30F5011
512
32
dsPIC30F5013
512
32
dsPIC30F5015
512
32
dsPIC30F5016
512
32
dsPIC30F6010
2048
128
dsPIC30F6010A
2048
128
dsPIC30F6011
1024
64
dsPIC30F6011A
1024
64
dsPIC30F6012
2048
128
dsPIC30F6012A
2048
128
dsPIC30F6013
1024
64
dsPIC30F6013A
1024
64
dsPIC30F6014
2048
128
dsPIC30F6014A
2048
128
dsPIC30F6015
2048
128
5.6.2
PROGRAMMING METHODOLOGY
The programming executive uses the PROGD command
to program the data EEPROM. Figure 5-4 illustrates
the flowchart of the process. Firstly, the number of rows
to program (RemainingRows) is based on the device
size, and the destination address (DestAddress) is set
to ‘0’. In this example, 128 rows (2048 words) of data
EEPROM will be programmed.
The first PROGD command programs the first row of
data EEPROM. Once the command completes
successfully, ‘RemainingRows’ is decremented by 1
and compared with 0. Since there are 127 more rows
to program, ‘BaseAddress’ is incremented by 0x20 to
point to the next row of data EEPROM. This process is
then repeated until all 128 rows of data EEPROM are
programmed.
FIGURE 5-4:
FLOWCHART FOR
PROGRAMMING
dsPIC30F6014A DATA
EEPROM
Is
PROGD response
PASS?
Is
RemainingRows
0?
Remaining Rows = 128
BaseAddress = 0
RemainingRows =
RemainingRows – 1
Finish
BaseAddress =
BaseAddress
No
Yes
+ 0x20
Start
Send
PROGD
Command with
BaseAddress
Failure
Report Error
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