參數(shù)資料
型號： DZPD6722VCCE
廠商： INTEL CORP
元件分類： 總線控制器
英文描述： ISA-to-PC-Card (PCMCIA) Controllers
中文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： LQFP-208
文件頁數(shù)： 20/138頁
文件大?。?/td> 723K
代理商： DZPD6722VCCE
PD6710/
’
22
—
ISA-to-PC-Card (PCMCIA) Controllers
20
Datasheet
Table 2. Socket Interface Pins
(Sheet 1 of 4)
Pin Name
1
Description
2
Pin Number
Qty.
I/O
Pwr.
Drive
PD6710
PD6722
Socket A
Socket B
-REG
Register Access:
In Memory Card
Interface mode, this output chooses
between attribute and common
memory. In I/O Card Interface mode for
non-DMA transfers, this signal is active
(low).
For DMA cycles on the PD6722 to a
DMA-capable card, -REG is inactive
during I/O cycles to indicate a DMA
cycle to or from the PC Card.
In ATA mode, this signal is always
inactive.
8
8
71
1
O-TS
2 or 3
2 mA
A[25:0]
PC Card socket address outputs.
48, 46, 44,
42, 40, 38,
36, 34, 32,
41, 43, 35,
33, 45, 27,
24, 29, 31,
47, 49, 50,
53, 56, 58,
59, 61
48, 46, 44,
42, 40, 38,
36, 34, 32,
41, 43, 35,
33, 45, 25,
21, 28, 30,
47, 49, 50,
53, 55, 57,
58, 60
110, 108,
106, 104,
102, 100,
98, 96, 94,
103, 105,
97, 95,
107, 89,
85, 91, 93,
109, 112,
113, 115,
118, 120,
121, 123
26
O-TS
2 or 3
2 mA
D[15:0]
PC Card socket data I/O signals.
23, 21, 17,
14, 12, 68,
66, 64, 19,
15, 13, 11,
9, 67, 65, 63
20, 18, 16,
14, 12, 67,
65, 63, 17,
15, 13, 11,
9, 66, 64,
62
84, 82, 80,
77, 75,
130, 128,
126, 81,
78, 76, 74,
72, 129,
127, 125
16
I/O
2 or 3
2 mA
-OE
Output Enable
: For non-DMA
transfers, this output goes active (low)
to indicate a memory read from the
socket.
During a DMA write (when -IORD is
active) this output goes low if the ISA
output TC is active (high), indicating to
the card that the system
’
s terminal
count signal is active. During DMA
reads (when -IOWR is active), this
output remains high.
26
23
87
1
O-TS
2 or 3
2 mA
1.
1
To differentiate the sockets, all PD6722 pin names have either A_ or B_ prepended to the pin names indicated. For example,
A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.
2.
2
When a socket is configured as an ATA drive interface, socket interface pin functions change. See
Table 17 on page 88
.
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