參數(shù)資料
型號： DZPD6722VCCE
廠商： INTEL CORP
元件分類： 總線控制器
英文描述： ISA-to-PC-Card (PCMCIA) Controllers
中文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： LQFP-208
文件頁數(shù)： 64/138頁
文件大?。?/td> 723K
代理商： DZPD6722VCCE
PD6710/
’
22
—
ISA-to-PC-Card (PCMCIA) Controllers
64
Datasheet
9.0
Memory Window Mapping Registers
The following information about the memory map windows is important:
The memory window mapping registers determine where in the ISA memory space and PC
Card memory space accesses will occur. There are five memory windows that can be used
independently.
The memory windows are enabled and disabled using the
Mapping Enable
register (see
“
Mapping Enable
”
on page 55
).
To specify where in the ISA space a memory window is mapped, start and end addresses are
specified. A memory window is selected whenever the appropriate Memory Map Enable bit
(see
“
Mapping Enable
”
) is set, and when the ISA address is greater than or equal to the
appropriate
System Memory Map Start Address
register (see
“
System Memory Map 0
–
4
Start Address Low
”
on page 64
) and the ISA address is less than or equal to the appropriate
System Memory Map End Address
register (see
“
System Memory Map 0
–
4 End Address
Low
”
on page 66
).
Start and end addresses are specified with ISA Address bits 23:12. This sets the minimum size
of a memory window to 4K bytes. Memory windows are specified in the ISA address from 64
Kbytes to 16 Mbytes (0010000h
–
FFFFFFh). Note that no memory window can be mapped in
the first 64 Kbytes of the ISA address space.
To ensure proper operation, none of the windows can overlap in the ISA address space.
9.1
System Memory Map 0
–
4 Start Address Low
There are five separate System Memory Map Start Address Low registers, each with identical
fields. These registers are located at the following indexes:
Index
10h
18h
20h
28h
30h
System Memory Map Start Address Low
System Memory Map 0 Start Address Low
System Memory Map 1 Start Address Low
System Memory Map 2 Start Address Low
System Memory Map 3 Start Address Low
System Memory Map 4 Start Address Low
Register Name:
System Memory Map 0
–
4 Start Address Low
Index:
10h, 18h, 20h, 28h, 30h
Register Per:
socket
Register Compatibility Type:
365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Start Address 19:12
RW:00000000
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