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SAM4CP [DATASHEET]
43051E–ATPL–08/14
10.1
System Controller and Peripheral Mapping
Refer to
“Memory Mapping of Code and SRAM area”
.
All the peripherals are in the bit band region and are mapped in the bit band alias region.
10.2
Power Supply Monitoring
The SAM4CP embeds Supply Monitor, Power-on-Reset and Brownout detectors for power supplies monitoring allowing
to warn and/or reset the chip.
10.2.1 Power-on-Reset on VDDCORE
The Power-on-Reset monitors VDDCORE. It is always activated and monitors voltage at start-up but also during power-
down. If VDDCORE goes below the threshold voltage, the entire chip (except VDDBU domain) is reset. For more
information, refer to the “Electrical Characteristics” section of the product datasheet.
10.2.2 Brownout Detector on VDDCORE
The Brownout Detector monitors VDDCORE. It is active by default. It can be deactivated by software through the Supply
Controller (SUPC_MR).
If VDDCORE goes below the threshold voltage, the reset of the core is asserted.
10.2.3 Power-on-Reset on VDDIO
The Power-on-Reset monitors VDDIO. It is always activated and monitors voltage at start-up but also during power-
down. If VDDIO goes below the threshold voltage, the IOs are reset but the core continues to run. Voltage detection is
fixed.
10.2.4 Supply Monitor on VDDIO
The supply monitor on VDDIO is fully programmable with 16 steps for the threshold (between 1.6V to 3.4V). It provides
the user the flexibility to set a voltage level detection higher then the power-on-reset on VDDIO. Either a reset or an
interrupt can be generated upon detection. It can be activated by software and it is controlled by the Supply Controller
(SUPC). A sample mode is possible. It divides the supply monitor power consumption by a factor of up to 2048.
The supply monitor is used as “system alert” in case VDDIO supply is falling. It can be used while the device is in backup
mode to wake up the device if VDDIO is falling.
10.2.5 Power-on-Reset and Brownout Detector on VDDBU
The Power-on-Reset monitors VDDBU. It is active by default and monitors voltage at start-up but also during power-
down. It can be deactivated by software through the Supply Controller (SUPC_MR). If VDDBU goes below the threshold
voltage, the entire chip is reset.
10.3
Reset Controller
The Reset Controller uses the Power-on-Reset supply monitor, and brownout detector cells.
The Reset Controller returns to the software either the source of the last reset, or of a general reset, a wake-up reset, a
software reset, a user reset, a watchdog or reinforced watchdog reset.
The Reset Controller controls the internal resets of the system (or independent reset of CM4P1 processor) and the NRST
pin input/output. It shapes a reset signal for the external devices, simplifying to a minimum connection of a push-button
on the NRST pin to implement a manual reset.
The configuration of the Reset Controller is saved as its is supplied by VDDBU.
10.4
Supply Controller (SUPC)
The Supply Controller controls the power supplies of each section of the processor.
The Supply Controller starts up the device by sequentially enabling the internal power switches and the Voltage
Regulator, then it generates the proper reset signals to the core power supply.
It also sets the system in different low-power modes, wakes it up from a wide range of events.