參數(shù)資料
型號: EDE2516ABSE-GE-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits DDR2 SDRAM for HYPER DIMM
中文描述: 16M X 16 DDR DRAM, 0.4 ns, PBGA84
封裝: ROHS COMPLIANT, FBGA-84
文件頁數(shù): 6/66頁
文件大?。?/td> 708K
代理商: EDE2516ABSE-GE-E
EDE2508ABSE, EDE2516ABSE
Preliminary Data Sheet E0573E30 (Ver. 3.0)
6
Recommended DC Operating Conditions (SSTL_18)
Parameter
Symbol
min.
typ.
max.
Unit
Notes
Supply voltage
VDD
1.7
1.8
1.9
V
4
Supply voltage for output
VDDQ
1.7
1.8
1.9
V
4
Supply voltage for DLL
VDDL
1.7
1.8
1.9
V
4
VREF
0.49
×
VDDQ
0.50
×
VDDQ
0.51
×
VDDQ
V
1, 2
Input reference voltage
Termination voltage
VTT
VIH (DC)
VIL (DC)
VREF
0.04
VREF
+
0.125
0.3
VREF
VREF
+
0.04
VDDQ
+
0.3
VREF – 0.125 V
V
V
3
DC input logic high
DC input low
AC input logic high
-6C, -6E
-5C
AC input low
-6C, -6E
-5C
Notes: 1. The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically
the value of VREF is expected to be about 0.5
×
VDDQ of the transmitting device and VREF are expected
to track variations in VDDQ.
2. Peak to peak AC noise on VREF may not exceed
±
2% VREF (DC).
3. VTT of transmitting device must track VREF of receiving device.
4. VDDQ tracks with VDD, VDDL tracks with VDD. AC parameters are measured with VDD, VDDQ and
VDDL tied together.
VIH (AC)
VREF
+
0.200
V
VIH (AC)
VREF
+
0.250
V
VIL (AC)
VREF – 0.200 V
VIL (AC)
VREF – 0.250 V
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