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參數(shù)資料
| 型號： | EM39LV80055RM |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | IC 8BIT DUAL BUS TXRX 3ST24TSSOP |
| 中文描述： | 分位（512Kx16）閃存 |
| 文件頁數(shù)： | 12/25頁 |
| 文件大?。?/td> | 295K |
| 代理商： | EM39LV80055RM |
EM39LV800
8M Bits (512Kx16) Flash Memory
SPECIFICATION
This specification is subject to change without further notice. (04.09.2004 V1.0)
Page 12 of
25
Capacitance (Ta=25
°
C, f=1Mhz, other pins open)
Parameter
Description
Test Conditons
Max
C
I/O
*
I/O Pin Capacitance
V
I/O
=0V
12pF
C
IN
*
Input Capacitance
V
IN
=0V
6pF
*
This parameter is measured only for initial qualification and after a design or process change that
could affect this parameter.
Table 10:
Capacitance (Ta=25
°
C, f=1Mhz, Other Pins Open)
Reliability Characteristics
Symbol
Parameter
Min Specification
Unit
Test Method
N
END
*
Endurance
10,000
Cycles
JEDEC Standard A117
T
DR
*
Data Retention
10
Years
JEDEC Standard A103
I
LTH
*
Latch Up
100+I
DD
mA
JEDEC Standard 78
*
This parameter is measured only for initial qualification and after a design or process change that
could affect this parameter.
Table 11:
Reliability Characteristics
AC Characteristics
Read Cycle Timing Parameters
55REC
70REC
90REC
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Unit
T
RC
Read Cycle Time
55
70
90
ns
T
CE
Chip Enable Access Time
55
70
90
ns
T
AA
Address Access Time
55
70
90
ns
T
OE
Output Enable Access Time
30
35
45
ns
T
CLZ
*
CE# Low to Active Output
0
0
0
ns
T
OLZ
*
OE# Low to Active Output
0
0
0
ns
T
CHZ
*
CE# High to High-Z Output
15
20
30
ns
T
OHZ
*
OE# High to High-Z Output
15
20
30
ns
T
OH
*
Output Hold from Address
Change
*
This parameter is measured only for initial qualification and after a design or process change that
could affect this parameter.
0
0
0
ns
Table 12a:
Read Cycle Timing Parameters
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| EM39LV80070M | 制造商:EMC 制造商全稱:ELAN Microelectronics Corp 功能描述:8M Bits (512Kx16) Flash Memory |
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