參數(shù)資料
型號: EM39LV80055RM
廠商: ELAN Microelctronics Corp .
英文描述: IC 8BIT DUAL BUS TXRX 3ST24TSSOP
中文描述: 分位(512Kx16)閃存
文件頁數(shù): 13/25頁
文件大小: 295K
代理商: EM39LV80055RM
EM39LV800
8M Bits (512Kx16) Flash Memory
SPECIFICATION
This specification is subject to change without further notice. (04.09.2004 V1.0)
Page 13 of
25
55EC
70EC
90EC
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Unit
T
RC
Read Cycle Time
55
70
90
ns
T
CE
Chip Enable Access Time
55
70
90
ns
T
AA
Address Access Time
55
70
90
ns
T
OE
Output Enable Access Time
30
35
45
ns
T
CLZ
*
CE# Low to Active Output
0
0
0
ns
T
OLZ
*
OE# Low to Active Output
0
0
0
ns
T
CHZ
*
CE# High to High-Z Output
15
20
30
ns
T
OHZ
*
OE# High to High-Z Output
15
20
30
ns
T
OH
*
Output Hold from Address
Change
*
This parameter is measured only for initial qualification and after a design or process change that
could affect this parameter.
0
0
0
ns
Table 12b:
Read Cycle Timing Parameters
Program/Erase Cycle Timing Parameter
Symbol
Parameter
Min
Max
Unit
T
BP
Word-Program Time
20
μ
s
T
AS
Address Setup Time
0
ns
T
AH
Address Hold Time
30
ns
T
CS
WE# and CE# Setup Time
0
ns
T
CH
WE# and CE# Hold Time
0
ns
T
OES
OE# High Setup Time
0
ns
T
OEH
OE# High Hold Time
10
ns
T
CP
CE# Pulse Width
45
ns
T
WP
WE# Pulse Width
45
ns
T
WPH
*
WE# Pulse Width High
30
ns
T
CPH
*
CE# Pulse Width High
30
ns
T
DS
Data Setup Time
45
ns
T
DH
*
Data Hold Time
0
ns
T
IDA
*
Software ID Access and Exit Time
150
ns
T
SE
Sector Erase
30
ms
T
BE
Block Erase
30
ms
T
SCE
Chip Erase
60
ms
*
This parameter is measured only for initial qualification and after a design or process change that
could affect this parameter.
Table 13:
Program/Erase Cycle Timing Parameter
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