參數(shù)資料
型號(hào)： EM78P468N
廠商： ELAN Microelctronics Corp .
元件分類： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 15/82頁(yè)
文件大小： 1491K
代理商： EM78P468N
EM78P468N
8-BIT Microcontroller
A1
Product Specification
(V1.2) 03.15.2005
(This specification is subject to change without further notice)
11
1
A10
A9
A8
A7
~
A0
R3
PC
CAL
RET
RETL
RETI
L
00 PAGE0 0
03FF
000~
01 PAGE1 0400~07FF
10 PAGE2 0800~0BFF
11 PAGE3 0C00~0FFF
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
STACK LEVEL 7
STACK LEVEL 8
Reset vector
000H
TCC overfl
errupt vector
ow nt
003H
Exteral INT
nterrupt vecto
0 pin
r
006H
Exteral INT1 pin nterrupt vector
Counter 1 underflow interrupt vector
Counter 2 underflow interrupt vector
high pulse width timer underflow interrupt vector
low pulse width timer underflow interrupt vector
Port 6,Port8 pin change wake-up interrupt vector
009H
00CH
00FH
012H
015H
018H
On-Chip Program memory
FFFH
U
Fig. 3 Program Counter Organization
ADDRESS
0 0
0 1
0 2
0 3
0 4
0 5
0 6
0 7
0 8
0 9
0 A
0 B
0 C
0 D
0 E
0 F
IAR (Indirect Addressing Register)
lock Counter)
Counter)
TCC (Time C
PC (Program
SR (Status R
RSR (RAM s
PORT5 (Port
PORT6 (Port6 I/O data register)
PORT7 (Port7
PORT8 (Por
LCDCR (LC
LCD_ADDR
LCD_DB (L
CNTER (Cou
)
SBPCR (Sy
IRCR (IR, Pin of IR;INT0/1;TCC control)
ISR (interrup
R5 bit 0 -> 0
control register page 0
R5 bit 0 -> 1
control register page 1
egister)
elect register)
5 & IOCPAGE Control)
I/O data register)
t8 I/O data register)
D control register)
(LCD address)
CD data buffer)
nter enable register
stem, Booster , PLL control)
t status register)
16 byte
1 0
|
1 F
common register
ban
32 byte common register
2 0
|
3 F
ort5 I/O & LCD segment control)
P5CR (P
P6CR (Port6 I/O c
l register)
R (Port7 I/O c
ol register)
(Port8 I/O c
l register)
_ADDR (128
RAM address)
byte
RAM_DB (128 by
M data buffer)
te RA
CNT1PR (Counter
eset register)
CNT2PR (Counter
eset register)
HPWTPR (High-p
width timer preset)
ulse
LPWTPR (Low-pulse width timer preset)
ontro
P7C
P8CR
ontr
ontro
RAM
1 pr
2 pr
IMR (interrupt mask register)
k 0 ~ bank 3
128 byte data RAM
LCD RAM 4*32 bits
CNT12CR (Counter 1,2 control register)
6PH (Port 6 pull-high control register)
P
6OD (Port 6 open drain control register)
P
control register)
P6PL (Port 6 pull-low control register)
WUCR
nk current)
TCCCR
rol register)
DTCR (WDT control register)
W
LPWTCR (high/low pulse width timer control)
Mem
iguration
H
P8PH (Port 8 pull-high
(Wake up & P5.7 si
(TCC & INT0 cont
ory Conf
Fig. 4 Data
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