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參數(shù)資料
| 型號： | Embedded Pentium 166 |
| 廠商： | Intel Corp. |
| 英文描述： | 32 Bit Embedded Pentium Processor(32位嵌入式奔騰處理器) |
| 中文描述： | 32位嵌入式奔騰處理器（32位嵌入式奔騰處理器） |
| 文件頁數(shù)： | 10/42頁 |
| 文件大小： | 882K |
| 代理商： | EMBEDDED PENTIUM 166 |
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Embedded Pentium
Processor
10
Datasheet
The decode unit decodes the prefetched instructions so the processor can execute the instruction.
The control ROM contains microcode to control the sequence of operations that must be performed
to implement the Pentium processor architecture. The control ROM unit has direct control over
both pipelines.
Pentium processors contain a pipelined floating-point unit that provides a significant floating-point
performance advantage over previous generations of processors.
Symmetric dual processing in a system is supported with two Pentium processors. The two
processors appear to the system as a single processor. Operating systems with dual processing
support properly schedule computing tasks between the two processors. This scheduling of tasks is
transparent to software applications and the end-user. Logic built into the processors supports a
“glueless” interface for easy system design. Through a private bus, the two Pentium processors
arbitrate for the external bus and maintain cache coherency. Dual processing is supported in a
system only if both processors are operating at identical core and bus frequencies.
In this document, in order to distinguish between two Pentium processors in dual processing mode,
one processor is the “Primary” processor and the other is the “Dual” processor. Note that this is a
different concept than that of “master” and “checker” processors described in the discussion on
functional redundancy on page 8.
The Pentium processor supports clock control. When the clock to the processor is stopped, power
dissipation is virtually eliminated. This makes the Pentium processor a good choice for energy-
efficient designs.
The Pentium processor supports fractional bus operation. This allows the processor core to operate
at high frequencies, while communicating with the external bus at lower frequencies.
The Pentium processor contains an on-chip Advanced Programmable Interrupt Controller (APIC).
This APIC implementation supports multiprocessor interrupt management (with symmetric
interrupt distribution across all processors), multiple I/O subsystem support, 8259A compatibility,
and inter-processor interrupt support.
Pentium processor architectural features are described in more detail in the
Embedded Pentium
Processor Family Developer’s Manual
(order number 273204).
1.2
Pentium
Processors with Voltage Reduction Technology
The Embedded Pentium processor with Voltage Reduction Technology is described in the
Embedded Pentium
Processor with Voltage Reduction Technology
datasheet (order number
273203).
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| Embedded Pentium 233 | 32 BIT Embedded Pentium Processor with MMX Technology(32位嵌入式帶MMX技術(shù)奔騰處理器) |
| Embedded Pentium 200 | 32 Bit Embedded Pentium Processor with MMX Technology(32位嵌入式帶MMX技術(shù)奔騰處理器) |
| Embedded Pentium 266 | Low-Power Embedded Pentium Processor with MMX Technology(低能量嵌入式帶MMX技術(shù)奔騰處理器) |
| EMBMOD133 | Intel Embedded Processor Module(英特爾嵌入式微處理器模塊) |
| EMBMOD166 | Intel Embedded Processor Module() |
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參數(shù)描述 |
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