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參數(shù)資料
| 型號： | Embedded Pentium 200 |
| 廠商： | Intel Corp. |
| 英文描述： | 32 Bit Embedded Pentium Processor with MMX Technology(32位嵌入式帶MMX技術奔騰處理器) |
| 中文描述： | 32位嵌入式MMX技術（32位嵌入式帶MMX公司的技術奔騰處理器Pentium處理器） |
| 文件頁數(shù)： | 1/46頁 |
| 文件大小： | 944K |
| 代理商： | EMBEDDED PENTIUM 200 |
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Embedded Pentium
Processor
with MMX Technology
200 MHz, 233 MHz
Datasheet
Product Features
The Pentium
processor with MMX technology provides the performance needed for
embedded applications. The Pentium processor with MMX technology is compatible with the
entire installed base of applications for MS-DOS*, Windows*, OS/2* and UNIX*. The Pentium
processor with MMX technology supports Intel’s MMX technology. The Pentium processor
with MMX technology superscalar architecture can execute two instructions per clock cycle.
Enhanced branch prediction, a pipelined floating-point unit and separate caches provide high
performance. Separate code and data caches reduce cache conflicts while remaining software
transparent. The Pentium processor with MMX technology has 4.5 million transistors and is
built on Intel’s enhanced CMOS silicon technology.
I
Support for MMX Technology
I
Compatible with Large Software Base
—MS-DOS*, Windows*, OS/2*, UNIX*
I
32-Bit Processor with 64-Bit Data Bus
I
Superscalar Architecture
—Enhanced Pipelines
—Two Pipelined Integer Units Capable of
Two Instructions per Clock
—Pipelined MMX Technology Unit
—Pipelined Floating-Point Unit
I
Separate Code and Data Caches
—16-Kbyte Code, 16-Kbyte Write Back
Data
—MESI Cache Protocol
I
Advanced Design Features
—Deeper Write Buffers
—Enhanced Branch Prediction Feature
—Virtual Mode Extensions
I
Enhanced CMOS Silicon Technology
I
4-Mbyte Pages for Increased TLB Hit Rate
I
IEEE 1149.1 Boundary Scan
I
Dual Processing Configuration
I
Internal Error Detection Features
I
Multiprocessor Support
—Multiprocessor Instructions
—Support for Second Level Cache
I
On-Chip Local APIC Controller
—Multiprocessor Interrupt Management
—8259 Compatible
I
Power Management Features
—System Management Mode
—Clock Control
I
Fractional Bus Operation
—233 MHz Core/66 MHz Bus
(iCOMP
Index 2.0 rating=203)
—200 MHz Core/66 MHz Bus
(iCOMP
Index 2.0 rating=182)
I
Plastic Pin Grid Array Package
Contact Intel Corporation for more information about iCOMP
Index 2.0 ratings.
Order Number: 273214-001
November 1998
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