參數(shù)資料
型號: ENC424J600-I/ML
廠商: Microchip Technology
文件頁數(shù): 50/168頁
文件大小: 0K
描述: IC ETHERNET CTRLR W/SPI 44-QFN
視頻文件: Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝: 45
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: SPI
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 96mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-VQFN 裸露焊盤
供應商設備封裝: 44-QFN(8x8)
包裝: 管件
產(chǎn)品目錄頁面: 684 (CN2011-ZH PDF)
配用: AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
2007 Microchip Technology Inc.
DS39599G-page 141
PIC18F2220/2320/4220/4320
16.0 ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
In 40 and 44-pin devices, the CCP1 module is
implemented as a standard CCP module with
enhanced PWM capabilities. Operation of the Capture,
Compare and standard single output PWM modes is
(CCP) Modules”. Discussion in that section relating to
PWM frequency and duty cycle also apply to the
enhanced PWM mode.
The ECCP module differs from the CCP with the addi-
tion of an enhanced PWM mode which allows for 2 or
4 output channels, user-selectable polarity, dead band
control and automatic shutdown and restart. These
features are discussed in detail in Section 16.4
The control register for CCP1 is shown in Register 16-1.
It differs from the CCP1CON register of PIC18F2X20
devices in that the two Most Significant bits are
implemented to control enhanced PWM functionality.
Note:
The ECCP (Enhanced Capture/ Compare/
PWM) module is only available on
PIC18F4X20 devices.
REGISTER 16-1:
CCP1CON: ECCP CONTROL REGISTER (40/44-PIN DEVICES)
R/W-0
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
P1M1:P1M0: PWM Output Configuration bits
If CCP1M3:CCP1M2 = 00, 01, 10 (Capture, Compare or disabled):
xx = P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
If CCP1M3:CCP1M2 = 11 (PWM modes):
00 = Single output: P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
bit 5-4
DC1B1:DC1B0: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in CCPR1L.
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