參數(shù)資料
型號： ENC424J600-I/ML
廠商： Microchip Technology
文件頁數(shù)： 95/168頁
文件大?。?/td> 0K
描述： IC ETHERNET CTRLR W/SPI 44-QFN
視頻文件： Fast 100 Mbps Ethernet PICtail Plus Overview
標(biāo)準(zhǔn)包裝： 45
控制器類型： 以太網(wǎng)控制器（IEEE 802.3）
接口： SPI
電源電壓： 3 V ~ 3.6 V
電流 - 電源： 96mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-VQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 44-QFN（8x8）
包裝： 管件
產(chǎn)品目錄頁面： 684 (CN2011-ZH PDF)
配用： AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
PIC16CR7X
DS21993C-page 30
2007 Microchip Technology Inc.
3.3
Reading the ROM Program
Memory
A program memory location may be read by writing two
bytes of the address to the PMADR and PMADRH reg-
isters and then setting control bit RD (PMCON1<0>).
Once the read control bit is set, the microcontroller will
use the next two instruction cycles to read the data. The
data is available in the PMDATA and PMDATH regis-
ters after the second NOP instruction. Therefore, it can
be read as two bytes in the following instructions. The
PMDATA and PMDATH registers will hold this value
until the next read operation.
3.4
Operation During Code-Protect
ROM program memory has its own code-protect mech-
anism. External Read operations by programmers are
disabled if this mechanism is enabled.
The microcontroller can read and execute instructions
out of the internal ROM program memory, regardless of
the state of the code-protect Configuration bits.
EXAMPLE 3-1:
ROM PROGRAM READ
TABLE 3-1:
REGISTERS ASSOCIATED WITH PROGRAM ROM
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
Resets
10Dh
PMADR
Address Register Low Byte
xxxx xxxx
uuuu uuuu
10Fh
PMADRH
—
Address Register High Byte
xxxx xxxx
uuuu uuuu
10Ch
PMDATA Data Register Low Byte
xxxx xxxx
uuuu uuuu
10Eh
PMDATH
—
Data Register High Byte
xxxx xxxx
uuuu uuuu
18Ch
PMCON1
—(1)
—
RD
1--- ---0
Legend:
x
= unknown, u = unchanged, r = reserved, – = unimplemented read as ‘0’. Shaded cells are not used during ROM
access.
Note
1:
This bit always reads as a ‘1’.
BSF
STATUS, RP1
;
BCF
STATUS, RP0
; Bank 2
MOVF
ADDRH, W
;
MOVWF
PMADRH
; MSByte of Program Address to read
MOVF
ADDRL, W
;
MOVWF
PMADR
; LSByte of Program Address to read
BSF
STATUS, RP0
; Bank 3 Required
Required
BSF
PMCON1, RD
; ROM Read Sequence
Sequence
NOP
; memory is read in the next two cycles after BSF PMCON1,RD
NOP
;
BCF
STATUS, RP0
; Bank 2
MOVF
PMDATA, W
; W = LSByte of Program PMDATA
MOVF
PMDATH, W
; W = MSByte of Program PMDATA
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ENC424J600-IPT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface
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ENC424J600T-IML 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface
ENC424J600T-IPT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface
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