The information contained in the APEX 20K Programmable" />
參數(shù)資料
型號: EP20K100EQC240-1
廠商: Altera
文件頁數(shù): 19/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 100K 240-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 24
系列: APEX-20K®
LAB/CLB數(shù): 416
邏輯元件/單元數(shù): 4160
RAM 位總計: 53248
輸入/輸出數(shù): 183
門數(shù): 263000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
其它名稱: 544-1863
EP20K100EQC240-1-ND
Altera Corporation
115
APEX 20K Programmable Logic Device Family Data Sheet
Revision
History
The information contained in the APEX 20K Programmable Logic Device
Family Data Sheet version 5.1 supersedes information published in
previous versions.
Version 5.1
APEX 20K Programmable Logic Device Family Data Sheet version 5.1
contains the following changes:
In version 5.0, the VI input voltage spec was updated in Table 28 on
In version 5.0, Note (5) to Tables 27 through 30 was revised.
Version 5.0
APEX 20K Programmable Logic Device Family Data Sheet version 5.0
contains the following changes:
Updated Tables 23 through 26. Removed 2.5-V operating condition
tables because all APEX 20K devices are now 5.0-V tolerant.
Updated conditions in Tables 33, 38 and 39.
Updated data for tESBDATAH parameter.
Version 4.3
APEX 20K Programmable Logic Device Family Data Sheet version 4.3
contains the following changes:
Updated Figure 20.
Updated Note (2) to Table 13.
Updated notes to Tables 27 through 30.
Version 4.2
APEX 20K Programmable Logic Device Family Data Sheet version 4.2
contains the following changes:
Updated Figure 29.
Updated Note (1) to Figure 29.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K100EQC240-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100EQC240-1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 416 Macro 183 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K100EQC240-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 416 Macro 183 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K100EQC240-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 416 Macro 183 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K100EQC240-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA