參數(shù)資料
型號: EP20K100EQI240-2X
廠商: Altera
文件頁數(shù): 32/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 100K 240-PQFP
標(biāo)準(zhǔn)包裝: 24
系列: APEX-20K®
LAB/CLB數(shù): 416
邏輯元件/單元數(shù): 4160
RAM 位總計(jì): 53248
輸入/輸出數(shù): 183
門數(shù): 263000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
Altera Corporation
21
APEX 20K Programmable Logic Device Family Data Sheet
Figure 9. APEX 20K Interconnect Structure
A row line can be driven directly by LEs, IOEs, or ESBs in that row.
Further, a column line can drive a row line, allowing an LE, IOE, or ESB to
drive elements in a different row via the column and row interconnect.
The row interconnect drives the MegaLAB interconnect to drive LEs,
IOEs, or ESBs in a particular MegaLAB structure.
A column line can be directly driven by LEs, IOEs, or ESBs in that column.
A column line on a device’s left or right edge can also be driven by row
IOEs. The column line is used to route signals from one row to another. A
column line can drive a row line; it can also drive the MegaLAB
interconnect directly, allowing faster connections between rows.
Figure 10 shows how the FastTrack Interconnect uses the local
interconnect to drive LEs within MegaLAB structures.
MegaLAB
I/O
MegaLAB
I/O
MegaLAB
I/O
Column
Interconnect
Column
Interconnect
Row
Interconnect
相關(guān)PDF資料
PDF描述
AGM43DTAD-S189 CONN EDGECARD 86POS R/A .156 SLD
EPF6024AFI256-2 IC FLEX 6000 FPGA 24K 256-FBGA
EPF6024ABI256-2 IC FLEX 6000 FPGA 24K 256-BGA
AMM28DTBT CONN EDGECARD 56POS R/A .156 SLD
EPF6016AQI208-2 IC FLEX 6000 FPGA 16K 208-PQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K100EQI240-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERC208-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERC208-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERC208-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERC240-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA