參數(shù)資料
型號: EP2AGX65DF29C4N
廠商: Altera
文件頁數(shù): 53/90頁
文件大小: 0K
描述: IC ARRIA II GX FPGA 65K 780FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 4
系列: Arria II GX
LAB/CLB數(shù): 2530
邏輯元件/單元數(shù): 60214
RAM 位總計: 5371904
輸入/輸出數(shù): 364
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 780-BBGA
供應(yīng)商設(shè)備封裝: 780-FBGA(29x29)
其它名稱: 544-2703
Chapter 1: Device Datasheet for Arria II Devices
1–49
Switching Characteristics
December 2013
Altera Corporation
GIGE Receiver Jitter Tolerance (11)
Deterministic jitter tolerance
(peak-to-peak)
Pattern = CJPAT
> 0.4
UI
Combined deterministic and
random jitter tolerance (peak-to-
peak)
Pattern = CJPAT
> 0.66
UI
HiGig Transmit Jitter Generation
Deterministic jitter
(peak-to-peak)
Data rate = 3.75 Gbps
Pattern = CJPAT
0.17
UI
Total jitter (peak-to-peak)
Data rate = 3.75 Gbps
Pattern = CJPAT
0.35
UI
HiGig Receiver Jitter Tolerance
Deterministic jitter tolerance
(peak-to-peak)
Data rate = 3.75 Gbps
Pattern = CJPAT
> 0.37
UI
Combined deterministic and
random jitter tolerance (peak-to-
peak)
Data rate = 3.75 Gbps
Pattern = CJPAT
> 0.65
UI
Sinusoidal jitter tolerance (peak-
to-peak)
Jitter frequency = 22.1 KHz
Data rate = 3.75 Gbps
Pattern = CJPAT
> 8.5
UI
Jitter frequency = 22.1 KHz
Data rate = 3.75 Gbps
Pattern = CJPAT
> 0.1
UI
Jitter frequency = 22.1 KHz
Data rate = 3.75 Gbps
Pattern = CJPAT
> 0.1
UI
(OIF) CEI Transmitter Jitter Generation
Total jitter (peak-to-peak)
Data rate = 6.375 Gbps
Pattern = PRBS15 BER = 10-12
——
0.3
0.3
UI
(OIF) CEI Receiver Jitter Tolerance
Deterministic jitter tolerance
(peak-to-peak)
Data rate = 6.375 Gbps
Pattern = PRBS31 BER = 10-12
> 0.675
UI
Combined deterministic and
random jitter tolerance (peak-to-
peak)
Data rate = 6.375 Gbps
Pattern = PRBS31 BER = 10-12
> 0.988
UI
Table 1–41. Transceiver Block Jitter Specifications for Arria II GZ Devices (Note 1), (2) (Part 4 of 7)
Symbol/
Description
Conditions
–C3 and –I3
–C4 and –I4
Unit
Min
Typ
Max
Min
Typ
Max
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EP2AGX65DF29C5 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C5N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6NES 制造商:Altera Corporation 功能描述:FPGA Arria