參數(shù)資料
型號(hào): EP2AGX65DF29C4N
廠商: Altera
文件頁(yè)數(shù): 62/90頁(yè)
文件大?。?/td> 0K
描述: IC ARRIA II GX FPGA 65K 780FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 4
系列: Arria II GX
LAB/CLB數(shù): 2530
邏輯元件/單元數(shù): 60214
RAM 位總計(jì): 5371904
輸入/輸出數(shù): 364
電源電壓: 0.87 V ~ 0.93 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 780-BBGA
供應(yīng)商設(shè)備封裝: 780-FBGA(29x29)
其它名稱(chēng): 544-2703
Chapter 1: Device Datasheet for Arria II Devices
1–57
Switching Characteristics
December 2013
Altera Corporation
DSP Block Specifications
Table 1–46 lists the DSP block performance specifications for Arria II GX devices.
Table 1–47 lists the DSP block performance specifications for Arria II GZ devices.
Table 1–46. DSP Block Performance Specifications for Arria II GX Devices (Note 1)
Mode
Resources
Used
Performance
Unit
Number of
Multipliers
C4
I3
C5,I5
C6
9 × 9-bit multiplier
1
380
310
300
250
MHz
12 × 12-bit multiplier
1
380
310
300
250
MHz
18 × 18-bit multiplier
1
380
310
300
250
MHz
36 × 36-bit multiplier
1
350
270
220
MHz
18 × 36-bit high-precision multiplier
adder mode
1
350
270
220
MHz
18 × 18-bit multiply accumulator
4
380
310
300
250
MHz
18 × 18-bit multiply adder
4
380
310
300
250
MHz
18 × 18-bit multiply adder-signed full
precision
2
380
310
300
250
MHz
18 × 18-bit multiply adder with
loopback (2)
2
275
220
180
MHz
36-bit shift (32-bit data)
1
350
270
220
MHz
Double mode
1
350
270
220
MHz
Notes to Table 1–46:
(1) Maximum is for a fully-pipelined block with Round and Saturation disabled.
(2) Maximum is for loopback input registers disabled, Round and Saturation disabled, pipeline and output registers enabled.
Table 1–47. DSP Block Performance Specifications for Arria II GZ Devices (Note 1) (Part 1 of 2)
Mode
Resources
Used
Performance
Unit
Number of
Multipliers
–3
–4
9 × 9-bit multiplier
1
460
400
MHz
12 × 12-bit multiplier
1
500
440
MHz
18 × 18-bit multiplier
1
550
480
MHz
36 × 36-bit multiplier
1
440
380
MHz
18 × 18-bit multiply accumulator
4
440
380
MHz
18 × 18-bit multiply adder
4
470
410
MHz
18 × 18-bit multiply adder-signed full
precision
2
450
390
MHz
18 × 18-bit multiply adder with
loopback (2)
2
350
310
MHz
36-bit shift (32-bit data)
1
440
380
MHz
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參數(shù)描述
EP2AGX65DF29C5 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C5N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Arria II GX 2530 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX65DF29C6NES 制造商:Altera Corporation 功能描述:FPGA Arria