Copyright Cirrus Logic, Inc. 2011 (All Rights Reserved) 23 EP7312 High-Performance, Low-Power S" />
參數(shù)資料
型號: EP7312-CB
廠商: Cirrus Logic Inc
文件頁數(shù): 16/54頁
文件大?。?/td> 0K
描述: IC ARM720T MCU 74MHZ 256-PBGA
標(biāo)準(zhǔn)包裝: 90
系列: EP7
核心處理器: ARM7
芯體尺寸: 32-位
速度: 74MHz
連通性: 編解碼器,DAI,EBI/EMI,IrDA,鍵盤,SPI/Microwire1,UART/USART
外圍設(shè)備: LCD,LED,MaverickKey,PWM
輸入/輸出數(shù): 27
程序存儲器類型: ROMless
RAM 容量: 56K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 2.7 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 256-BGA
包裝: 托盤
配用: 598-1209-ND - KIT DEVELOPMENT EP73XX ARM7
其它名稱: 598-1232
DS508F2
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
23
EP7312
High-Performance, Low-Power System on Chip
Static Memory Single Write Cycle
Note:
1. The cycle time can be extended by integer multiples of the clock period (22 ns at 45 MHz, 27 ns at 36 MHz, 54 ns at
18.432 MHz, and 77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period
where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
2. Zero wait states for sequential writes is not permitted for memory devices which use nMWE pin, as this cannot be driven with
valid timing under zero wait state conditions.
3. Address, Data, Halfword, Word, and Write hold state until next cycle.
EXPCLK
nCS
A
nMWE
HALF-
WORD
D
WRITE
t
HWd
t
WDd
t
CSd
t
Ad
t
MWd
t
Dv
t
MWh
t
CSh
nMOE
EXPRDY
t
EXh
t
EXs
Figure 8. Static Memory Single Write Cycle Timing Measurement
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP7312-CB/E 制造商:Cirrus Logic 功能描述:
EP7312-CB-90 制造商:Cirrus Logic 功能描述:
EP7312-CB-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-CBZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312-CR 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low-PWR SOC w/SDRAM RoHS:否 制造商:Cirrus Logic