參數(shù)資料
型號: EP9315-CB
廠商: Cirrus Logic Inc
文件頁數(shù): 14/16頁
文件大?。?/td> 0K
描述: IC ARM920T MCU 200MHZ 352-PBGA
標準包裝: 40
系列: EP9
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 200MHz
連通性: EBI/EMI,EIDE,以太網(wǎng),I²C,IrDA,鍵盤/觸摸屏,PCMCIA,SPI,UART/USART,USB
外圍設備: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 352-BGA
包裝: 托盤
配用: 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9
其它名稱: 598-1261
ER638E2B
7
Description 1
Under certain circumstances, data in coprocessor registers or in memory may be corrupted. The following
sequence of instructions will cause the corruption:
1) Let the first instruction be both:
- any coprocessor instruction that is not executed1.
- stalled by the coprocessor due to an internal dependency.
2) Let the second instruction be any two-word coprocessor load or store4.
If the second instruction is a load, the upper word in the target register will generally get an incorrect value.
If the second instruction is a store, the word immediately following the second target memory location will
be written; that is, instead of just writing two consecutive 32-bit words (a 64-bit value or a double value) to
memory, a third 32-bit word immediately following this will be written, leading to memory corruption.
Consider a simple example with a store instruction:
cfaddne
c0, c1, c2
; assume this does not execute
cfstr64
c3, [r2, #0x0]
Three words will be written to memory. The correct values will appear at the memory location pointed to by
r2, and r2 + 0x4. Another value will be written at r2 + 0x8.
Consider now an example with a load instruction:
cfaddne
c0, c1, c2
; assume this does not execute
cfldrd
c3, [r2, #0x0]
The final value in c3 will be incorrect. The lower 32 bits will be correct, while the upper 32 bits will be
incorrect.
Finally, consider a case where a branch occurs:
target
cfldrd
c3, [r2, #0x0]
b
target
nop
cfadd
c0, c1, c2
; though in pipeline, this does not execute
Note: The above examples assume that the cfaddne or cfadd would busy-wait (for whatever reason) if
actually executed. If not, the execution of the following instruction would be correct.
(Continued)
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