參數(shù)資料
型號: EPF10K130EQI240-2
廠商: Altera
文件頁數(shù): 42/100頁
文件大?。?/td> 0K
描述: IC FLEX 10KE FPGA 130K 240-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 24
系列: FLEX-10KE®
LAB/CLB數(shù): 832
邏輯元件/單元數(shù): 6656
RAM 位總計: 65536
輸入/輸出數(shù): 186
門數(shù): 342000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
其它名稱: 544-2206
46
Altera Corporation
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Figure 20 shows the timing requirements for the JTAG signals.
Figure 20. FLEX 10KE JTAG Waveforms
Table 18 shows the timing parameters and values for FLEX 10KE devices.
Table 18. FLEX 10KE JTAG Timing Parameters & Values
Symbol
Parameter
Min
Max
Unit
tJCP
TCK
clock period
100
ns
tJCH
TCK
clock high time
50
ns
tJCL
TCK
clock low time
50
ns
tJPSU
JTAG port setup time
20
ns
tJPH
JTAG port hold time
45
ns
tJPCO
JTAG port clock to output
25
ns
tJPZX
JTAG port high impedance to valid output
25
ns
tJPXZ
JTAG port valid output to high impedance
25
ns
tJSSU
Capture register setup time
20
ns
tJSH
Capture register hold time
45
ns
tJSCO
Update register clock to output
35
ns
tJSZX
Update register high impedance to valid output
35
ns
tJSXZ
Update register valid output to high impedance
35
ns
TDO
TCK
tJPZX
t
JPCO
tJPH
t JPXZ
tJCP
tJPSU
t JCL
tJCH
TDI
TMS
Signal
to Be
Captured
Signal
to Be
Driven
t
JSZX
tJSSU
tJSH
t
JSCO
tJSXZ
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EPF10K130EQI240-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 832 LABs 186 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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