參數(shù)資料
型號： EPF10K50VBC356-3N
廠商： Altera
文件頁數(shù)： 13/128頁
文件大?。?/td> 0K
描述： IC FLEX 10KV FPGA 50K 356-BGA
產(chǎn)品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 24
系列： FLEX-10K®
LAB/CLB數(shù)： 360
邏輯元件/單元數(shù)： 2880
RAM 位總計： 20480
輸入/輸出數(shù)： 274
門數(shù)： 116000
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 356-BGA
供應(yīng)商設(shè)備封裝： 356-BGA（35x35）
Altera Corporation
11
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Larger blocks of RAM are created by combining multiple EABs. For
example, two 256
× 8 RAM blocks can be combined to form a
256
× 16 RAM block; two 512 × 4 blocks of RAM can be combined to form
a 512
× 8RAM block. See Figure 3.
Figure 3. Examples of Combining EABs
If necessary, all EABs in a device can be cascaded to form a single RAM
block. EABs can be cascaded to form RAM blocks of up to 2,048 words
without impacting timing. Altera’s software automatically combines
EABs to meet a designer’s RAM specifications.
EABs provide flexible options for driving and controlling clock signals.
Different clocks can be used for the EAB inputs and outputs. Registers can
be independently inserted on the data input, EAB output, or the address
and WE inputs. The global signals and the EAB local interconnect can drive
the WE signal. The global signals, dedicated clock pins, and EAB local
interconnect can drive the EAB clock signals. Because the LEs drive the
EAB local interconnect, the LEs can control the WE signal or the EAB clock
signals.
Each EAB is fed by a row interconnect and can drive out to row and
column interconnects. Each EAB output can drive up to two row channels
and up to two column channels; the unused row channel can be driven by
other LEs. This feature increases the routing resources available for EAB
outputs. See Figure 4.
512
× 4
512
× 4
256
× 8
256
× 8
256
× 16
512
× 8
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPF10K50VBC356-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50VBC356-4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50VBI356-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50VBI356-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50VBI356-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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