參數(shù)資料
型號: EPM9560ARI208-10
廠商: Altera
文件頁數(shù): 45/46頁
文件大?。?/td> 0K
描述: IC MAX 9000 CPLD 560 208-RQFP
產(chǎn)品變化通告: Package Change 30/Jun/2010
標準包裝: 48
系列: Max® 9000
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 10.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
邏輯元件/邏輯塊數(shù)目: 35
宏單元數(shù): 560
門數(shù): 12000
輸入/輸出數(shù): 153
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP 裸露焊盤
供應商設備封裝: 208-RQFP(28x28)
包裝: 托盤
其它名稱: 544-2364
8
Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
Macrocells
The MAX 9000 macrocell consists of three functional blocks: the product
terms, the product-term select matrix, and the programmable register.
The macrocell can be individually configured for both sequential and
combinatorial logic operation. See Figure 3.
Figure 3. MAX 9000 Macrocell & Local Array
Combinatorial logic is implemented in the local array, which provides five
product terms per macrocell. The product-term select matrix allocates
these product terms for use as either primary logic inputs (to the OR and
XOR
gates) to implement combinatorial functions, or as secondary inputs
to the macrocell’s register clear, preset, clock, and clock enable control
functions. Two kinds of expander product terms (“expanders”) are
available to supplement macrocell logic resources:
Shareable expanders, which are inverted product terms that are fed
back into the logic array
Parallel expanders, which are product terms borrowed from adjacent
macrocells
The MAX+PLUS II software automatically optimizes product-term
allocation according to the logic requirements of the design.
VCC
Product-
Term
Select
Matrix
16 Local
Feedbacks
16 Shareable
Expander Product
LAB Local
Array
Parallel
Expanders
(from Other
Macrocells)
Clear
Select
Global
Clear
Global
Clocks
Clock/
Enable
Select
2
PRN
CLRN
D/T
Q
ENA
Register
Bypass
To Row or
Column
FastTrack
Interconnect
Programmable
Register
Macrocell
Input Select
Local Array
Feedback
33 Row
FastTrack
Interconnect
Inputs
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