AD1937
DLRCLK
DBCLK
Rev. B | Page 23 of 36
DAISY-CHAIN MODE
The AD1937 also allows a daisy-chain configuration to expand
In this mode, the DBCLK frequency is 512 × fS. The first eight
slots of the TDM DAC data stream belong to the first AD1937
in the chain and the last eight slots belong to the second AD1937.
The second AD1937 is the device attached to the DSP TDM port.
To accommodate 16 channels at a 96 kHz sample rate, the
AD1937 can be configured into a dual-line, TDM mode as
shown in
Figure 23. This mode allows a slower DBCLK than
normally required by the one-line TDM mode. The first four
channels of each TDM input belong to the first AD1937 in the
chain and the last four channels belong to the second AD1937.
The dual-line TDM mode can also be used to send data at a
192 kHz sample rate into the AD1937, as shown in
Figure 24.
There are two configurations for the ADC port to work in
daisy-chain mode. The first configuration is with an ABCLK
at 256 × fS, see Figure 25. The second configuration is with an ABCLK at 512 × fS, see Figure 26. Note that in the 512 × fS ABCLK mode, the ADC channels occupy the first eight
slots; the second eight slots are empty. The TDM ADC data
in (ASDATA2) port of the first AD1937 must be grounded
in all modes of operation.
The I/O pins of the serial ports are defined according to the
serial mode selected. See
Table 19 for a detailed description
of the function of each pin. See
Figure 27 for a typical AD1937
configuration with two external stereo DACs and two external
stereo ADCs.
8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN
8 UNUSED SLOTS
8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN
DSDATA1 (TDM ADC DATA IN)
OF THE SECOND AD1937
DSDATA2 (TDM DAC DATA OUT)
OF THE SECOND AD1937;
THIS IS THE TDM
TO THE FIRST AD1937
DAC1L
DAC1R
DAC2L
DAC2R
DAC3L
DAC3R
DAC4L
DAC4R
DAC1L
DAC1R
DAC2L
DAC2R
DAC3L
DAC3R
DAC4L
DAC4R
DAC1L
DAC1R
DAC2L
DAC2R
DAC3L
DAC3R
DAC4L
DAC4R
32 BITS
MSB
DSP
SECOND
AD1937
FIRST
AD1937
07
41
4-
01
9
Figure 22. Single-Line Daisy-Chain TDM Mode 16-Channel 48 kHz DAC Configuration
DLRCLK
DBCLK
8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN
8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN
DSDATA1
(TDM DAC DATA IN)
DAC1L
DAC1R
DAC2L
DAC2R
DAC1L
DAC1R
DAC2L
DAC2R
DSDATA3
(TDM DAC2 DATA IN)
DAC3L
DAC3R
DAC4L
DAC4R
DAC3L
DAC3R
DAC4L
DAC4R
DSDATA2
(TDM DAC DATA OUT)
DAC1L
DAC1R
DAC2L
DAC2R
DSDATA4
(TDM DAC2 DATA OUT)
DAC3L
DAC3R
DAC4L
DAC4R
32 BITS
DSP
SECOND
AD1937
FIRST
AD1937
MSB
07
41
4-
0
20
Figure 23. Dual-Line Daisy-Chain TDM Mode16-Channel 96 kHz DAC Configuration