參數(shù)資料
型號(hào): EVAL-AD5420EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/32頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD5420
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 1
位數(shù): 16
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 10µs
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD5420
Single-Channel, 12-/16-Bit, Serial Input, 4 mA to 20 mA,
Current Source DAC, HART Connectivity
Data Sheet
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2009–2013 Analog Devices, Inc. All rights reserved.
FEATURES
12-/16-bit resolution and monotonicity
Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or
0 mA to 24 mA
±0.01% FSR typical total unadjusted error (TUE)
±3 ppm/°C typical output drift
Flexible serial digital interface
On-chip output fault detection
On-chip reference (10 ppm/°C maximum)
Feedback/monitoring of output current
Asynchronous clear function
Power supply (AVDD) range
10.8 V to 40 V; AD5410AREZ/AD5420AREZ
10.8 V to 60 V; AD5410ACPZ/AD5420ACPZ
Output loop compliance to AVDD 2.5 V
Temperature range: 40°C to +85°C
24-lead TSSOP and 40-lead LFCSP packages
APPLICATIONS
Process control
Actuator control
PLC
HART network connectivity
GENERAL DESCRIPTION
The AD5410/AD5420 are low cost, precision, fully integrated
12-/16-bit converters offering a programmable current source
output designed to meet the requirements of industrial process
control applications. The output current range is programmable
at 4 mA to 20 mA, 0 mA to 20 mA, or an overrange function of
0 mA to 24 mA. The output is open-circuit protected. The device
operates with a power supply (AVDD) range from 10.8 V to
60 V. Output loop compliance is 0 V to AVDD 2.5 V.
The flexible serial interface is SPI, MICROWIRE, QSPI, and
DSP compatible and can be operated in 3-wire mode to mini-
mize the digital isolation required in isolated applications.
The device also includes a power-on reset function, ensuring
that the device powers up in a known state, and an asynchronous
CLEAR pin that sets the output to the low end of the selected
current range.
The total unadjusted error is typically ±0.01% FSR.
COMPANION PRODUCTS
FUNCTIONAL BLOCK DIAGRAM
INPUT SHIFT
REGISTER
AND CONTROL
LOGIC
AD5410/AD5420
POWER-
ON
RESET
VREF
R2
R3
RSET
IOUT
AVDD
CAP2
LATCH
SCLK
SDIN
SDO
CAP1
12-/16-BIT
DAC
12/16
DVCC
SELECT
CLEAR
FAULT
BOOST
REFIN
GND
REFOUT
07027-
001
R3SENSE
Figure 1.
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