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參數(shù)資料
| 型號： | EVAL-AD5425EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD5425 |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 2.47M |
| 數(shù)據(jù)接口： | 串行 |
| 設(shè)置時間： | 15ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 125°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5425 |
| 相關(guān)產(chǎn)品： | AD5425YRMZ-REEL7-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRMZ-REEL-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRMZ-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRM-REEL7-ND - IC DAC 8BIT MULTIPLYING 10-MSOP AD5425YRM-REEL-ND - IC DAC 8BIT MULTIPLYING 10-MSOP AD5425YRM-ND - IC DAC MULTIPLYING 8BIT 10-MSOP |
Data Sheet
AD5425
Rev. C | Page 21 of 24
MICROWIRE-to-AD5425 Interface
Figure 44 shows an interface between the DAC and any
MICROWIRE
-compatible device. Serial data is shifted out on
the falling edge of the serial clock, SK, and is clocked into the
DAC input shift register on the rising edge of SK, which
corresponds to the falling edge of the DAC’s SCLK.
Figure 44. MICROWIRE-to-AD5425 Interface
PIC16C6x/7x-to-AD5425
The PIC16C6x/7x synchronous serial port (SSP) is configured
as an SPI master with the clock polarity bit (CKP) = 0. This is
done by writing to the synchronous serial port control register
(SSPCON) (see the PIC16/17 microcontroller user manual). In
this example, I/O Port RA1 is being used to provide a SYNC
signal and enable the DAC serial port. This microcontroller
transfers eight bits of data during each serial transfer operation.
Figure 45 shows the connection diagram.
Figure 45. PIC16C6x/7x-to-AD5425 Interface
03161-044
CS
AD54251
SCLK
SK
SDIN
SO
MICROWIRE1
1 ADDITIONAL PINS OMITTED FOR CLARITY.
SYNC
03161-045
RA1
AD54251
SCLK
SCK/RC3
SDIN
SDI/RC4
PIC16C6x/7x1
1 ADDITIONAL PINS OMITTED FOR CLARITY.
SYNC
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