參數(shù)資料
型號(hào)： EVAL-AD5443SDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/25頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD5443
標(biāo)準(zhǔn)包裝： 1
系列： *
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 17 of 24
SINGLE-SUPPLY APPLICATIONS
Current Mode Operation
These DACs are specified and tested to guarantee operation
in single-supply applications. In the current mode circuit of
Figure 43, IOUT2 and hence IOUT1 is biased positive by an amount
applied to VBIAS.
VOUT
GND
VIN
IOUT2
IOUT1
RFB
A1
VREF
VDD
VBIAS
VDD
C1
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE
REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.
A1
03162-044
A2
Figure 43. Single-Supply Current Mode Operation
In this configuration, the output voltage is given by
VOUT = {D × (RFB/RDAC) × (VBIAS VIN)} + VBIAS
As D varies from 0 to 255 (AD5426), 1023 (AD5432) or 4095
(AD5443), the output voltage varies from
VOUT = VBIAS to VOUT = 2 VBIAS VIN
VBIAS should be a low impedance source capable of sinking and
sourcing all possible variations in current at the IOUT2 terminal
without any problems.
It is important to note that VIN is limited to low voltages because
the switches in the DAC ladder no longer have the same source
drain drive voltage. As a result, their on resistance differs, which
degrades the linearity of the DAC. See Figure 15 to Figure 20.
Voltage Switching Mode of Operation
Figure 44 shows these DACs operating in the voltage switching
mode. The reference voltage, VIN, is applied to the IOUT1 pin,
IOUT2 is connected to AGND, and the output voltage is available
at the VREF terminal. In this configuration, a positive reference
voltage results in a positive output voltage, making single-
supply operation possible. The output from the DAC is voltage
at a constant impedance (the DAC ladder resistance), thus an
op amp is necessary to buffer the output voltage. The reference
input no longer sees a constant input impedance, but one that
varies with code. Therefore, the voltage input should be driven
from a low impedance source.
VIN
R2
R1
VOUT
GND
IOUT1
RFB
A1
VREF
VDD
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
03162-045
Figure 44. Single-Supply Voltage Switching Mode Operation
It is important to note that VIN is limited to low voltages because
the switches in the DAC ladder no longer have the same source
drain drive voltage. As a result, their on resistance differs, which
degrades the linearity of the DAC.
Also, VIN must not go negative by more than 0.3 V or an
internal diode turns on, exceeding the maximum ratings of the
device. In this type of application, the full range of multiplying
capability of the DAC is lost.
POSITIVE OUTPUT VOLTAGE
Note that the output voltage polarity is opposite to the VREF
polarity for dc reference voltages. To achieve a positive voltage
output, an applied negative reference to the input of the DAC
is preferred over the output inversion through an inverting
amplifier because of the resistor’s tolerance errors. To generate
a negative reference, the reference can be level shifted by an
op amp such that the VOUT and GND pins of the reference
become the virtual ground and 2.5 V, respectively, as shown
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1 IS
A HIGH SPEED AMPLIFIER.
VOUT = 0V
TO +2.5V
GND
IOUT2
IOUT1
RFB
A1
VREF
VDD = 5V
VDD
C1
GND
VIN
VOUT
ADR03
–2.5V
–5V
+5V
03162-046
Figure 45. Positive Voltage Output with Minimum of Components
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