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參數(shù)資料
| 型號： | EVAL-AD5546SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5546 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
AD5546/AD5556
Data Sheet
Rev. D | Page 4 of 20
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
RS Pulse Width
tRS
VDD = 5 V
20
ns
VDD = 3 V
35
ns
WR to LDAC Delay Time
tLWD
VDD = 5 V
0
ns
VDD = 3 V
0
ns
SUPPLY CHARACTERISTICS
Power Supply Range
VDD RANGE
2.7
5.5
V
Positive Supply Current
IDD
Logic inputs = 0 V
10
μA
Power Dissipation
PDISS
Logic inputs = 0 V
0.055
mW
Power Supply Sensitivity
PSS
VDD = ±5%
0.003
%/%
AC CHARACTERISTICS4
Output Voltage Settling
Time
tS
To ±0.1% of full scale, data cycles from zero
scale to full scale to zero scale
0.5
μs
Reference Multiplying BW
BW
VREF = 100 mV rms, data = full scale, C6 =5.6 pF5
6.8
MHz
DAC Glitch Impulse
Q
VREF = 0 V, midscale minus 1 to midscale
3
nV-s
Multiplying Feedthrough
Error
VOUT/VREF
VREF = 100 mV rms, f = 10 kHz
79
dB
Digital Feedthrough
QD
WR = 1, LDAC toggles at 1 MHz
7
nV-s
Total Harmonic Distortion
THD
VREF = 5 V p-p, data = full-scale, f = 1 kHz
–103
dB
Output Noise Density
eN
f = 1 kHz, BW = 1 Hz
12
nV/rt Hz
1 All static performance tests (except IOUT) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is
tied to the amplifier output. The op amp +IN is grounded, and the DAC IOUT is tied to the op amp –IN. Typical values represent average readings measured at 25°C.
2 These parameters are guaranteed by design and are not subject to production testing.
3 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
4 All ac characteristic tests are performed in a closed-loop system using an AD8038 I-V converter amplifier except for THD where an AD8065 was used.
5 C6 is the C6 capacitor shown in Figure 20.
TIMING DIAGRAM
03
81
0-
0
05
tWR
tDS
tDH
tLWD
tLDAC
tRS
WR
DATA
LDAC
RS
Figure 3. AD5546/AD5556 Timing Diagram
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