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| 型號： | EVAL-AD5933EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/40頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD5933 |
| 產(chǎn)品培訓(xùn)模塊： | AD5933 Impedance to Digital Converter ADP2102 DSP Battery Life Applications Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計時，直接數(shù)字合成（DDS） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD5933 |
| 主要屬性： | 12 位數(shù)模轉(zhuǎn)換器，24 位調(diào)節(jié)字寬 |
| 次要屬性： | 16MHz 2.7 V ~ 5.5 V 圖形用戶界面 |
| 已供物品： | 板，纜線，CD |
| 產(chǎn)品目錄頁面： | 797 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD5933YRSZ-REEL7-ND - NETWORK ANALYZER 12B 1MSP 16SSOP AD5933YRSZ-ND - IC NTWK ANALYZER 12B 1MSP 16SSOP |
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AD5933
Data Sheet
Rev. E | Page 24 of 40
Table 11. Control Register Map (D11, D8 to D0)
Bits
Description
D11
No operation
D8
PGA gain; 0 = ×5, 1 = ×1
D7
Reserved; set to 0
D6
Reserved; set to 0
D5
Reserved; set to 0
D4
Reset
D3
External system clock; set to 1
Internal system clock; set to 0
D2
Reserved; set to 0
D1
Reserved; set to 0
D0
Reserved; set to 0
Control Register Decode
Initialize with Start Frequency
This command enables the DDS to output the programmed
start frequency for an indefinite time. It is used to excite the
unknown impedance initially. When the output unknown
impedance has settled after a time determined by the user, the
user must initiate a start frequency sweep command to begin
the frequency sweep.
Start Frequency Sweep
In this mode the ADC starts measuring after the programmed
number of settling time cycles has elapsed. The user has the
ability to program an integer number of output frequency cycles
(settling time cycles) to Register Address 0x8A and Register
Address 0x8B before the commencement of the measurement
at each frequency point (see Figure 28).
Increment Frequency
The increment frequency command is used to step to the next
frequency point in the sweep. This usually happens after data
from the previous step has been transferred and verified by the
DSP. When the AD5933 receives this command, it waits for the
programmed number of settling time cycles before beginning
the ADC conversion process.
Repeat Frequency
The AD5933 has the facility to repeat the current frequency
point measurement by issuing a repeat frequency command to
the control register. This has the benefit of allowing the user to
average successive readings.
Measure Temperature
The measure temperature command initiates a temperature
reading from the part. The part does not need to be in power-
up mode to perform a temperature reading. The block powers
itself up, takes the reading, and then powers down again. The
temperature reading is stored in a 14-bit, twos complement
format at Register Address 0x92 and Register Address 0x93.
Power-Down Mode
The default state on power-up of the AD5933 is power-down
mode. The control register contains the code 1010,0000,0000,0000
(0xA000). In this mode, both the VOUT and VIN pins are
connected internally to GND.
Standby Mode
This mode powers up the part for general operation; in standby
mode the VIN and VOUT pins are internally connected to ground.
Output Voltage Range
The output voltage range allows the user to program the
excitation voltage range at VOUT.
PGA Gain
The PGA gain allows the user to amplify the response signal
into the ADC by a multiplication factor of ×5 or ×1.
Reset
A reset command allows the user to interrupt a sweep. The start
frequency, number of increments, and frequency increment
register contents are not overwritten. An initialize with start
frequency command is required to restart the frequency sweep
command sequence.
START FREQUENCY REGISTER (REGISTER
ADDRESS 0x82, REGISTER ADDRESS 0x83,
REGISTER ADDRESS 0x84)
The default value of the start frequency register upon reset is
as follows: D23 to D0 are not reset on power-up. After a reset
command, the contents of this register are not reset.
The start frequency register contains the 24-bit digital represen-
tation of the frequency from where the subsequent frequency
sweep is initiated. For example, if the user requires the sweep to
start from frequency 30 kHz (using a 16.0 MHz clock), then the
user programs the value of 0x0F to Register Address 0x82, the
value of 0x5C to Register Address 0x83, and the value of 0x28 to
Register Address 0x84. This ensures the output frequency starts
at 30 kHz.
The code to be programmed to the start frequency register is
28
C
5
F
0
x
0
2
4
MHz
16
kHz
30
27 ≡
×
=
Code
Frequency
Start
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