參數(shù)資料
型號: EVAL-AD5933EBZ
廠商: Analog Devices Inc
文件頁數(shù): 9/40頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD5933
產(chǎn)品培訓(xùn)模塊: AD5933 Impedance to Digital Converter
ADP2102 DSP Battery Life Applications
Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),直接數(shù)字合成(DDS)
嵌入式:
已用 IC / 零件: AD5933
主要屬性: 12 位數(shù)模轉(zhuǎn)換器,24 位調(diào)節(jié)字寬
次要屬性: 16MHz 2.7 V ~ 5.5 V 圖形用戶界面
已供物品: 板,纜線,CD
產(chǎn)品目錄頁面: 797 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: AD5933YRSZ-REEL7-ND - NETWORK ANALYZER 12B 1MSP 16SSOP
AD5933YRSZ-ND - IC NTWK ANALYZER 12B 1MSP 16SSOP
Data Sheet
AD5933
Rev. E | Page 17 of 40
IMPEDANCE CALCULATION
MAGNITUDE CALCULATION
The first step in impedance calculation for each frequency point
is to calculate the magnitude of the DFT at that point.
The DFT magnitude is given by
2
I
R
Magnitude
+
=
where:
R is the real number stored at Register Address 0x94 and
Register Address 0x95.
I is the imaginary number stored at Register Address 0x96 and
Register Address 0x97.
For example, assume the results in the real data and imaginary
data registers are as follows at a frequency point:
Real data register = 0x038B = 907 decimal
Imaginary data register = 0x0204 = 516 decimal
506
.
1043
)
516
907
(
2
=
+
=
Magnitude
To convert this number into impedance, it must be multiplied
by
a scaling factor called the gain factor. The gain factor is
calculated during the calibration of the system with a known
impedance connected between the VOUT and VIN pins.
Once the gain factor has been calculated, it can be used in the
calculation of any unknown impedance between the VOUT and
VIN pins.
GAIN FACTOR CALCULATION
An example of a gain factor calculation follows, with the
following assumptions:
Output excitation voltage = 2 V p-p
Calibration impedance value, ZCALIBRATION = 200 k
PGA Gain = ×1
Current-to-voltage amplifier gain resistor = 200 k
Calibration frequency = 30 kHz
Then typical contents of the real data and imaginary data
registers after a frequency point conversion are:
Real data register = 0xF064 = 3996 decimal
Imaginary data register = 0x227E = +8830 decimal
106
.
9692
)
8830
(
)
3996
(
2
=
+
=
Magnitude
Impedance
Code
Admittance
Factor
Gain
=
=
1
12
-
10
×
515.819
106
.
9692
k
200
1
=
=
Factor
Gain
IMPEDANCE CALCULATION USING GAIN FACTOR
The next example illustrates how the calculated gain factor
derived previously is used to measure an unknown impedance.
For this example, assume that the unknown impedance = 510
k.
After measuring the unknown impedance at a frequency of
30 kHz, assume that the real data and imaginary data registers
contain the following data:
Real data register = 0xFA3F = 1473 decimal
Imaginary data register = 0x0DB3 = +3507 decimal
863
.
3802
)
3507
(
)
1473
((
2
=
+
=
Magnitude
Then the measured impedance at the frequency point is given
by
Impedance
Magnitude
Factor
Gain
×
=
1
=
×
=
k
791
.
509
863
.
3802
10
819273
.
515
1
12
GAIN FACTOR VARIATION WITH FREQUENCY
Because the AD5933 has a finite frequency response, the gain
factor also shows a variation with frequency. This variation in
gain factor results in an error in the impedance calculation over
a frequency range. Figure 22 shows an impedance profile based
on a single-point gain factor calculation. To minimize this error,
the frequency sweep should be limited to as small a frequency
range as possible.
101.5
98.5
54
66
FREQUENCY (kHz)
IMPED
A
N
C
E
(k
)
101.0
100.5
100.0
99.5
99.0
56
58
60
62
64
VDD = 3.3V
CALIBRATION FREQUENCY = 60kHz
TA = 25°C
MEASURED CALIBRATION IMPEDANCE = 100k
05324-
022
Figure 22. Impedance Profile Using a Single-Point Gain Factor Calculation
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