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參數(shù)資料
| 型號： | EVAL-AD7194EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/57頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR AD7194 |
| 設(shè)計資源： | EVAL-AD7zzzEBZ Schematic AD7194 Gerber Files |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7194 |
| 已供物品： | 板，線纜 |
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AD7194
Data Sheet
Rev. A | Page 10 of 56
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
08
56
6-
0
05
NOTES
1. NC = NO CONNECT.
2. CONNECT EXPOSED PAD TO AGND.
24 DVDD
23 AVDD
22 DGND
21 AGND
20 AIN16
19 AIN15
18 REFIN1(–)
17 REFIN1(+)
1
2
3
4
5
6
7
8
AIN1/P3
AIN2/P2
AIN3/P1/REFIN2(+)
AIN4/P0/REFIN2(–)
AINCOM
AGND
AIN5
AIN6
9
10
11
12
13
14
15
16
AI
N7
AI
N8
AI
N9
AI
N10
AI
N
11
AI
N12
AI
N13
AI
N14
32
31
30
29
28
27
26
25
CS
SC
L
K
MC
L
K
2
MC
L
K
1
DI
N
DO
UT
/R
D
Y
NC
SY
N
C
TOP VIEW
(Not to Scale)
AD7194
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
AIN1/P3
Analog Input/Digital Output Pin. This pin can function as an analog input pin. When the GP32EN bit is set
to 1, the pin functions as a general-purpose output bit referenced between AVDD and AGND.
2
AIN2/P2
Analog Input/Digital Output Pin. This pin can function as an analog input pin. When the GP32EN bit is set
to 1, the pin functions as a general-purpose output bit referenced between AVDD and AGND.
3
AIN3/P1/REFIN2(+)
Analog Input/Digital Output Pin/Positive Reference Input. This pin functions as an analog input pin. When
the GP10EN bit is set to 1, the pin functions as a general-purpose output bit referenced between AVDD and
AGND. When the REFSEL bit in the configuration register is set to 1, this pin functions as REFIN2(+). An
external reference can be applied between REFIN2(+) and REFIN2(). REFIN2(+) can lie anywhere between
AVDD and AGND + 1 V.
4
AIN4/P0/REFIN2()
Analog Input/Digital Output Pin/Positive Reference Input. This pin functions as an analog input pin. When
the GP10EN bit is set to 1, the pin functions as a general-purpose output bit referenced between AVDD and
AGND. When the REFSEL bit in the configuration register is set to 1, this pin functions as REFIN2(). An
external reference can be applied between REFIN2(+) and REFIN2(). This reference input can lie anywhere
between AGND and AVDD 1 V.
5
AINCOM
Analog Input AIN1 to Analog Input AIN16 are referenced to this input when the bit pseudo is set to 1.
6
AGND
Analog Ground Reference Point.
7
AIN5
Analog Input Pin.
8
AIN6
Analog Input Pin.
9
AIN7
Analog Input Pin.
10
AIN8
Analog Input Pin.
11
AIN9
Analog Input Pin.
12
AIN10
Analog Input Pin.
13
AIN11
Analog Input Pin.
14
AIN12
Analog Input Pin.
15
AIN13
Analog Input Pin.
16
AIN14
Analog Input Pin.
17
REFIN1(+)
Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1().
REFIN1(+) can lie anywhere between AVDD and AGND + 1 V. The nominal reference voltage, (REFIN1(+)
REFIN1()), is AVDD, but the part functions with a reference from 1 V to AVDD.
18
REFIN1()
Negative Reference Input. This reference input can lie anywhere between AGND and AVDD 1 V.
19
AIN15
Analog Input Pin.
20
AIN16
Analog Input Pin.
21
AGND
Analog Ground Reference Point.
22
DGND
Digital Ground Reference Point.
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