參數(shù)資料
型號： EVAL-AD7699EDZ
廠商： Analog Devices Inc
文件頁數(shù)： 15/28頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD7699
標準包裝： 1
系列： PulSAR®
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 500k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
輸入范圍： 0 ~ Vdd
在以下條件下的電源（標準）： 28mW @ 500kSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7699
已供物品： 板
AD7699
Data Sheet
Rev.
| Page 22 of 28
GENERAL TIMING WITHOUT A BUSY INDICATOR
Figure 35 details the timing for all three modes: reading/writing
during conversion, after conversion, and spanning conversion.
Note that the gating item for both CFG and data readback is at
the end of conversion (EOC). At the end of conversions (EOC),
if CNV is high, the busy indicator is disabled.
As detailed previously, the data access should occur up to safe
data reading/writing time, tDATA. If the full CFG word was not
written to prior to EOC, it is discarded and the current
configuration remains. If the conversion result is not read out
fully prior to EOC, it is lost as the ADC updates SDO with the
MSB of the current conversion. For detailed timing, refer to
Figure 36 and Figure 37, which depict reading/writing spanning
conversion with all timing details, including setup, hold, and SCK.
When CNV is brought low after EOC, SDO is driven from high
impedance to the MSB. Falling SCK edges clock out bits starting
with MSB 1.
The SCK can idle high or low depending on the clock polarity
(CPOL) and clock phase (CPHA) settings if SPI is used. A simple
solution is to use CPOL = CPHA = 0 as shown in Figure 35 with
SCK idling low.
073
54-
03
3
PHASE
CNV
DIN
SDO
READ/
W
R
IT
E
DUR
IN
G
CO
NVE
R
T
READ/
W
R
IT
E
AF
T
E
R
C
O
NV
E
RT
RE
A
D/
W
RI
T
E
S
P
ANN
IN
G
CO
NVE
R
T
DIN
SDO
DIN
SDO
SCK
NOTES
1. CNV MUST BE HIGH PRIOR TO THE END OF CONVERSION (EOC) TO AVOID THE BUSY INDICATOR.
A TOTAL OF 16 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z. IF CFG READBACK
IS ENABLED, A TOTAL OF 30 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z.
tCYC
tCONV
tDATA
1
ACQUISITION
(n – 1)
ACQUISITION
(n)
ACQUISITION
(n + 1)
ACQUISITION
(n + 2)
CONVERSION (n – 1)
CONVERSION (n)
CONVERSION (n + 1)
CONVERSION (n – 2)
DATA
(n – 2)
DATA
(n – 2)
DATA
(n – 1)
DATA
(n – 1)
DATA (n)
DATA
(n + 1)
CFG (n)
CFG (n + 2)
CFG (n + 1)
CFG (n + 3)
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
1
16/30
DATA
(n – 2)
DATA
(n – 1)
DATA (n + 1)
DATA (n)
CFG (n)
CFG (n + 1)
CFG (n + 2)
CFG (n + 3)
XXX
DATA (n – 2)
DATA (n – 1)
DATA (n)
XXX
CFG (n)
CFG (n + 1)
CFG (n + 2)
MSB
(n – 1)
MSB
(n + 1)
MSB
(n)
MSB
(n – 2)
END OF CONVERSION (EOC)
START OF CONVERSION
EOC
POWER
UP
Figure 35. General Interface Timing for the AD7699 Without a Busy Indicator
B
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