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參數(shù)資料
| 型號(hào)： | EVAL-AD7699EDZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 17/28頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7699 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 輸入范圍： | 0 ~ Vdd |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 28mW @ 500kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7699 |
| 已供物品： | 板 |
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AD7699
Data Sheet
Rev.
| Page 24 of 28
GENERAL TIMING WITH A BUSY INDICATOR
Figure 38 details the timing for all three modes: reading/writing
during conversion, after conversion, and spanning conversion.
Note that the gating item for both CFG and data readback is at
the end of conversion (EOC). As detailed previously, the data
access should occur up to safe data reading/writing time, tDATA.
If the full CFG word is not written to prior to EOC, it is
discarded and the current configuration remains.
At the EOC, if CNV is low, the busy indicator is enabled. In
addition, to generate the busy indicator properly, the host must
assert a minimum of 17 SCK falling edges to return SDO to
high impedance because the last bit of data on SDO remains
active. Unlike the case detailed in the General Timing Without
a Busy Indicator section, if the conversion result is not read out
fully prior to EOC, the last bit clocked out remains. If this bit is
low, the busy signal indicator cannot be generated because the
digital output requires a high impedance, or a bit remaining high,
to low transition for the interrupt input of the host. A good
example of this occurs when an SPI host sends 16 SCKs because
these are usually limited to 8-bit or 16-bit bursts, thus the LSB
remains. Because the transition noise of the AD7699 is 4 LSBs
peak to peak (or greater), the LSB is low 50% of the time. For
this interface, the SPI host needs to burst 24 SCKs, or a QSPI
interface can be used and programmed for 17 SCKs.
The SCK can idle high or low depending on the CPOL and
CPHA settings if SPI is used. A simple solution is to use CPOL
= CPHA = 1 (not shown) with SCK idling high.
tCYC
tCONV
tDATA
POWER
UP
END OF CONVERSION (EOC)
START OF CONVERSION
EOC
ACQUISITION
(n –1)
ACQUISITION
(n)
ACQUISITION
(n + 1)
ACQUISITION
(n + 2)
CONVERSION (n – 1)
CONVERSION (n)
CONVERSION (n + 1)
CONVERSION (n – 2)
READ/
W
R
IT
E
DUR
IN
G
CO
NV
ERT
READ/
W
R
IT
E
AF
T
E
R
CO
NVE
R
T
RE
A
D/
W
RI
T
E
SP
AN
NI
NG
CO
NVE
R
T
PHASE
CNV
DIN
SDO
DIN
SDO
DIN
SDO
SCK
07354-
036
NOTES
1. CNV MUST BE HIGH PRIOR TO THE END OF CONVERSION (EOC) TO AVOID THE BUSY INDICATOR.
A TOTAL OF 17 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z. IF CFG READBACK
IS ENABLED, A TOTAL OF 31 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z.
DATA (n – 2)
DATA
(n – 2)
DATA
(n – 1)
DATA
(n – 1)
DATA (n)
DATA (n + 1)
CFG (n)
CFG (n + 2)
CFG (n + 1)
CFG (n + 3)
XXX
DATA
(n – 2)
DATA
(n – 1)
DATA (n)
1
17/31
1
17/31
1
17/31
11
17/31
117/31
1
17/31
1
17/31
1
17/31
1
17/31
1
17/31
XXX
CFG (n)
CFG (n + 1)
CFG (n + 2)
DATA
(n – 2)
DATA
(n – 1)
DATA (n)
DATA (n + 1)
CFG (n)
CFG (n + 1)
CFG (n + 2)
CFG (n + 3)
Figure 38. General Interface Timing for the AD7699 With a Busy Indicator
B
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