AD7725–SPECIFICATIONS1(AVDD = " />
參數(shù)資料
型號: EVAL-AD7725CBZ
廠商: Analog Devices Inc
文件頁數(shù): 12/28頁
文件大小: 0K
描述: BOARD EVALUATION FOR AD7725
標準包裝: 1
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 900k
數(shù)據(jù)接口: 串行,并聯(lián)
輸入范圍: ±VREF
在以下條件下的電源(標準): 615mW @ 900kSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD7725
已供物品: 板,CD
相關產(chǎn)品: AD7725BSZ-ND - IC ADC 16BIT PROG 44MQFP
REV. A
–2–
AD7725–SPECIFICATIONS1(AVDD = 5 V 5%, AGND = AGND1 = AGND2 = DGND= 0 V,
fCLKIN
2 = 9.6 MHz, REF2 = 2.5 V, T
A = TMIN to TMAX, unless otherwise noted.)
B Version
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC SPECIFICATIONS
When tested with the FIR filter in
Figure 1, HALF_PWR = Logic High
Bipolar Mode
Signal-to-Noise
3
Measurement Bandwidth = 0.5
fO
4
2.5 V Reference
77
83
dB
3 V Reference
79
85
dB
Total Harmonic Distortion
3, 5
–94
–86
dB
Spurious Free Dynamic Range
3, 5
–98
–89
dB
Unipolar Mode
Signal-to-Noise
3
Measurement Bandwidth = 0.5
fO
4
83
dB
Total Harmonic Distortion
3, 5
–94
dB
ANALOG INPUTS
Full-Scale Input Span
VIN(+) – VIN(–)
Bipolar Mode
Differential or Single-Ended Input
±4/5
VREF2
V
Unipolar Mode
Single-Ended Input
0
8/5
VREF2
V
Absolute Input Voltage
VIN(+) and/or VIN(–)
AGND
AVDD
V
Input Sampling Capacitance
2
pF
Input Sampling Rate, fCLKIN
14.4
6
MHz
CLOCK
CLKIN Duty Ratio
45
55
%
REFERENCE
REF1 Output Resistance
3.5
k
Reference Buffer
Offset Voltage
Offset between REF1 and REF2
±3mV
Using Internal Reference
REF2 Output Voltage
2.39
2.54
2.69
V
REF2 Output Voltage Drift
60
ppm/
°C
Using External Reference
REF2 Input Impedance
REF1 = AGND
8
k
REF2 External Voltage Input
7
2.5
V
STATIC PERFORMANCE
Resolution
16
Bits
Differential Nonlinearity (DNL)
3
Guaranteed Monotonic
±0.5
±18
LSB
Integral Nonlinearity (INL)
3
±2
LSB
DC CMRR
80
dB
Offset Error
±20
mV
Gain Error
3, 9
±0.5
%FSR
LOGIC INPUTS (Excluding CLKIN)
VINH, Input High Voltage
2.0
V
VINL, Input Low Voltage
0.8
V
CLOCK INPUT (CLKIN)
VINH, Input High Voltage
0.7
DVDD
V
VINL, Input Low Voltage
0.3
DVDD
V
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